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| author | Hans de Goede <hdegoede@redhat.com> | 2015-04-06 20:16:36 +0200 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2015-05-04 11:59:21 +0200 |
| commit | 92bcc6cb1e297a18e70b98d1ba93f7a7c3a5e04e (patch) | |
| tree | b93809c1a004a62ed230df39c515e42584c9f365 /arch/arm/cpu/armv7/sunxi/board.c | |
| parent | dcfa530f0967382df9ecb2dc513446f929769d60 (diff) | |
sunxi: Also set Auxiliary Ctl SMP bit in SPL
There is no reason not to and this make the #ifdef-ery easier to read.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'arch/arm/cpu/armv7/sunxi/board.c')
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/board.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index c1b4cf5c2f..6471c6b7b2 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -94,8 +94,9 @@ void s_init(void) * access gets messed up (seems cache related) */ setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0x1800); #endif -#if !defined CONFIG_SPL_BUILD && (defined CONFIG_MACH_SUN7I || \ - defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I) +#if defined CONFIG_MACH_SUN6I || \ + defined CONFIG_MACH_SUN7I || \ + defined CONFIG_MACH_SUN8I /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */ asm volatile( "mrc p15, 0, r0, c1, c0, 1\n" |