diff options
| author | Tom Rini <trini@konsulko.com> | 2016-04-01 08:17:55 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-04-01 08:17:55 -0400 |
| commit | 40345e9ea74b0caef06f205364bb2cf93528cc40 (patch) | |
| tree | 9f19a59f6580893d10933c3c9275552bd613cdcf /arch/arm/cpu/armv7/sunxi/clock.c | |
| parent | 7f5b1e9bd952ebdac917264f03522371a473b60c (diff) | |
| parent | 3ffe39ed2b66af71c7271d0cef2a248b5bf7dfdb (diff) | |
Merge branch 'master' of http://git.denx.de/u-boot-sunxi
Diffstat (limited to 'arch/arm/cpu/armv7/sunxi/clock.c')
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/clock.c | 65 |
1 files changed, 0 insertions, 65 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c deleted file mode 100644 index 0b8fc94711..0000000000 --- a/arch/arm/cpu/armv7/sunxi/clock.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * (C) Copyright 2007-2012 - * Allwinner Technology Co., Ltd. <www.allwinnertech.com> - * Tom Cubie <tangliang@allwinnertech.com> - * - * (C) Copyright 2013 Luke Kenneth Casson Leighton <lkcl@lkcl.net> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/arch/clock.h> -#include <asm/arch/gpio.h> -#include <asm/arch/prcm.h> -#include <asm/arch/sys_proto.h> - -__weak void clock_init_sec(void) -{ -} - -int clock_init(void) -{ -#ifdef CONFIG_SPL_BUILD - clock_init_safe(); -#endif - clock_init_uart(); - clock_init_sec(); - - return 0; -} - -/* These functions are shared between various SoCs so put them here. */ -#if defined CONFIG_SUNXI_GEN_SUN6I && !defined CONFIG_MACH_SUN9I -int clock_twi_onoff(int port, int state) -{ - struct sunxi_ccm_reg *const ccm = - (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - - if (port == 5) { - if (state) - prcm_apb0_enable( - PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C); - else - prcm_apb0_disable( - PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C); - return 0; - } - - /* set the apb clock gate and reset for twi */ - if (state) { - setbits_le32(&ccm->apb2_gate, - CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT + port)); - setbits_le32(&ccm->apb2_reset_cfg, - 1 << (APB2_RESET_TWI_SHIFT + port)); - } else { - clrbits_le32(&ccm->apb2_reset_cfg, - 1 << (APB2_RESET_TWI_SHIFT + port)); - clrbits_le32(&ccm->apb2_gate, - CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT + port)); - } - - return 0; -} -#endif |