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authorTom Rini <trini@ti.com>2014-10-26 14:13:24 -0400
committerTom Rini <trini@ti.com>2014-10-26 14:13:24 -0400
commitd0796defbe8eff6fc3c27c893dcbc47af59d4764 (patch)
treed24f8d1617534954e807047dcdd5cec054847bb3 /arch/arm/cpu/armv7/sunxi/clock_sun4i.c
parent1fba907f9a8d178eee960294ecffc8ee8bc6b00d (diff)
parentaccc9e446be6c3bd129315a0c5830bddccfa16da (diff)
Merge http://git.denx.de/u-boot-sunxi
Diffstat (limited to 'arch/arm/cpu/armv7/sunxi/clock_sun4i.c')
-rw-r--r--arch/arm/cpu/armv7/sunxi/clock_sun4i.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
index ecbdb0162b..4a0d64fb30 100644
--- a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
@@ -180,6 +180,17 @@ void clock_set_pll1(unsigned int hz)
}
#endif
+unsigned int clock_get_pll5p(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ uint32_t rval = readl(&ccm->pll5_cfg);
+ int n = ((rval & CCM_PLL5_CTRL_N_MASK) >> CCM_PLL5_CTRL_N_SHIFT);
+ int k = ((rval & CCM_PLL5_CTRL_K_MASK) >> CCM_PLL5_CTRL_K_SHIFT) + 1;
+ int p = ((rval & CCM_PLL5_CTRL_P_MASK) >> CCM_PLL5_CTRL_P_SHIFT);
+ return (24000000 * n * k) >> p;
+}
+
unsigned int clock_get_pll6(void)
{
struct sunxi_ccm_reg *const ccm =