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authorHans de Goede <hdegoede@redhat.com>2015-08-08 12:36:44 +0200
committerHans de Goede <hdegoede@redhat.com>2015-08-14 08:37:38 +0200
commit49043cbad1db2e97daffe54d5ee32103c11dd4fd (patch)
tree8bcf19d4634c6ab93278d00323548486e02254c7 /arch/arm/cpu/armv7/sunxi/clock_sun6i.c
parentfbf10ae98657f1a888b670078f4eb18f9172c834 (diff)
sunxi: clock: Add clock_get_pll3() helper function
Add a helper function to get the pll3 clock rate. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'arch/arm/cpu/armv7/sunxi/clock_sun6i.c')
-rw-r--r--arch/arm/cpu/armv7/sunxi/clock_sun6i.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
index 3bfa122ec0..1d6f839fa7 100644
--- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
@@ -188,6 +188,18 @@ void clock_set_pll11(unsigned int clk, bool sigma_delta_enable)
}
#endif
+unsigned int clock_get_pll3(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ uint32_t rval = readl(&ccm->pll3_cfg);
+ int n = ((rval & CCM_PLL3_CTRL_N_MASK) >> CCM_PLL3_CTRL_N_SHIFT) + 1;
+ int m = ((rval & CCM_PLL3_CTRL_M_MASK) >> CCM_PLL3_CTRL_M_SHIFT) + 1;
+
+ /* Multiply by 1000 after dividing by m to avoid integer overflows */
+ return (24000 * n / m) * 1000;
+}
+
unsigned int clock_get_pll6(void)
{
struct sunxi_ccm_reg *const ccm =