diff options
| author | Marek Vasut <marex@denx.de> | 2015-07-27 22:34:17 +0200 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2016-01-31 16:32:56 +0100 |
| commit | 11aa6a32eb5f38dd670342072b9e885269013d62 (patch) | |
| tree | cac2ee59928935441baf617c43fb312c7347297f /arch/arm/cpu/armv7/syslib.c | |
| parent | 3709844f2366cd75eacee1deeedadaa507ddc9a1 (diff) | |
arm: cache: Implement cache range check for v7
Add code to aid tracking down cache alignment issues.
In case DEBUG is defined in the cache.c, this code will
check alignment of each attempt to flush/invalidate data
cache and print a warning if the alignment is incorrect.
If DEBUG is not defined, this code is optimized out.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/cpu/armv7/syslib.c')
0 files changed, 0 insertions, 0 deletions