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| author | Stephen Warren <swarren@nvidia.com> | 2012-05-16 05:59:59 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-07-07 14:07:18 +0200 |
| commit | e21649be56a0cbe17ea892fc6c1a633369df0d50 (patch) | |
| tree | 681695ef6c979d836aef5c0ca38061a2e5c9583f /arch/arm/cpu/armv7/tegra2/funcmux.c | |
| parent | defd5e497960b870d11bffbfd952ec3eaf2dd20e (diff) | |
tegra: add UART1 on GPU funcmux entry
TrimSlice uses UART1 on the GPU pingroup.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/armv7/tegra2/funcmux.c')
| -rw-r--r-- | arch/arm/cpu/armv7/tegra2/funcmux.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/tegra2/funcmux.c b/arch/arm/cpu/armv7/tegra2/funcmux.c index e2d1273dc9..c27908821a 100644 --- a/arch/arm/cpu/armv7/tegra2/funcmux.c +++ b/arch/arm/cpu/armv7/tegra2/funcmux.c @@ -45,6 +45,11 @@ int funcmux_select(enum periph_id id, int config) pinmux_tristate_disable(PINGRP_UAB); bad_config = 0; break; + case FUNCMUX_UART1_GPU: + pinmux_set_func(PINGRP_GPU, PMUX_FUNC_UARTA); + pinmux_tristate_disable(PINGRP_GPU); + bad_config = 0; + break; } if (!bad_config) { /* |