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authorTom Rini <trini@ti.com>2015-01-22 11:24:11 -0500
committerTom Rini <trini@ti.com>2015-01-22 20:04:06 -0500
commit032c6867a2925c95897afe07d1f0678114254cf6 (patch)
tree880d379cab669b1a1da81c46a487987c1a6baf78 /arch/arm/cpu/armv7/uniphier/ph1-pro4
parent1d6a95011ffa25241c2e9c112893f6c6c96f2b46 (diff)
parent0ba924a4ecfe056ab637bfa207fc26cd0248e9ac (diff)
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
Diffstat (limited to 'arch/arm/cpu/armv7/uniphier/ph1-pro4')
-rw-r--r--arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c6
-rw-r--r--arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c4
-rw-r--r--arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c8
3 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c b/arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c
index 2dcc0892cc..1db90f88a0 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c
+++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c
@@ -11,7 +11,7 @@
#undef DPLL_SSC_RATE_1PER
-void dpll_init(void)
+static void dpll_init(void)
{
u32 tmp;
@@ -46,7 +46,7 @@ void dpll_init(void)
writel(tmp, SC_DPLLCTRL2);
}
-void stop_mpll(void)
+static void stop_mpll(void)
{
u32 tmp;
@@ -62,7 +62,7 @@ void stop_mpll(void)
;
}
-void vpll_init(void)
+static void vpll_init(void)
{
u32 tmp, clk_mode_axosel;
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c b/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c
index b4dd799a88..b7c4b10969 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c
+++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c
@@ -21,8 +21,8 @@ void sg_init(void)
#endif
writel(tmp, SG_MEMCONF);
- /* Input ports must be enabled deasserting reset of cores */
+ /* Input ports must be enabled before deasserting reset of cores */
tmp = readl(SG_IECTRL);
- tmp |= 0x1;
+ tmp |= 1 << 6;
writel(tmp, SG_IECTRL);
}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c b/arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c
index 1973ab04c2..2d1bde6f13 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c
+++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c
@@ -9,7 +9,7 @@
#include <asm/arch/umc-regs.h>
#include <asm/arch/ddrphy-regs.h>
-static inline void umc_start_ssif(void __iomem *ssif_base)
+static void umc_start_ssif(void __iomem *ssif_base)
{
writel(0x00000001, ssif_base + 0x0000b004);
writel(0xffffffff, ssif_base + 0x0000c004);
@@ -52,8 +52,8 @@ static inline void umc_start_ssif(void __iomem *ssif_base)
writel(0x00000001, ssif_base + UMC_DMDRST);
}
-void umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base,
- int size, int freq)
+static void umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base,
+ int size, int freq)
{
writel(0x66bb0f17, dramcont + UMC_CMDCTLA);
writel(0x18c6aa44, dramcont + UMC_CMDCTLB);
@@ -88,7 +88,7 @@ void umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base,
writel(0x80000020, dramcont + UMC_DFICUPDCTLA);
}
-static inline int umc_init_sub(int freq, int size_ch0, int size_ch1)
+static int umc_init_sub(int freq, int size_ch0, int size_ch1)
{
void __iomem *ssif_base = (void __iomem *)UMC_SSIF_BASE;
void __iomem *ca_base0 = (void __iomem *)UMC_CA_BASE(0);