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authorStefan Agner <stefan@agner.ch>2015-04-15 16:24:25 +0530
committerTom Rini <trini@konsulko.com>2015-04-23 14:56:09 -0400
commit7a90a1f260908eb13b3948da0315a729795db1ab (patch)
tree97549246c6322f52d599862a183efc7203610902 /arch/arm/cpu/armv7/vf610
parent1db503c4b982a06741142588756fdd788474034c (diff)
ARM: vf610: Enable caches
Enables caches which provides a rather huge speedup of the boot loader. Also mark the on-chip RAM as cachable since this is the area U-Boot runs from. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Diffstat (limited to 'arch/arm/cpu/armv7/vf610')
-rw-r--r--arch/arm/cpu/armv7/vf610/generic.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c
index 3bdc2211e7..1bb9b8ed1d 100644
--- a/arch/arm/cpu/armv7/vf610/generic.c
+++ b/arch/arm/cpu/armv7/vf610/generic.c
@@ -342,3 +342,19 @@ int get_clocks(void)
#endif
return 0;
}
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
+ enum dcache_option option = DCACHE_WRITETHROUGH;
+#else
+ enum dcache_option option = DCACHE_WRITEBACK;
+#endif
+ dcache_enable();
+ icache_enable();
+
+ /* Enable caching on OCRAM */
+ mmu_set_region_dcache_behaviour(IRAM_BASE_ADDR, IRAM_SIZE, option);
+}
+#endif