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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-02-21 16:43:19 +0100
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-02-21 16:43:19 +0100
commit03268374db9133686b738acca212247023840ffc (patch)
treec511f6501522c2e8cf02edc85024aeb5042e792a /arch/arm/cpu/armv7/zynq/Makefile
parent9f024f62e4604274a23213dcee30016092e32e7b (diff)
parent00ed34589880ca7092999ec5b92e061018d0fd0f (diff)
Merge 'u-boot-microblaze/mainline/arm' into 'u-boot-arm/master'
This pulls the three following ZYNQ commits into ARM master: 7dca54f8: xilinx: zynq: Enable DCC and create new zynq_dcc board 59c651f4: arm: zynq: Add SLCR support with system reset 00ed3458: arm: zynq: Add lowlevel initialization to C
Diffstat (limited to 'arch/arm/cpu/armv7/zynq/Makefile')
-rw-r--r--arch/arm/cpu/armv7/zynq/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/zynq/Makefile b/arch/arm/cpu/armv7/zynq/Makefile
index 499ace4a62..388085dc2a 100644
--- a/arch/arm/cpu/armv7/zynq/Makefile
+++ b/arch/arm/cpu/armv7/zynq/Makefile
@@ -30,6 +30,7 @@ LIB = $(obj)lib$(SOC).o
COBJS-y := timer.o
COBJS-y += cpu.o
+COBJS-y += slcr.o
COBJS := $(COBJS-y)