diff options
| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-02-19 10:55:58 +0100 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-02-19 10:55:58 +0100 |
| commit | 1feb6e3c9216a34885f24f0df4a02a30dfb35f19 (patch) | |
| tree | a971d9d2fe6528910cf7acaf7632b747731c6caa /arch/arm/cpu/armv7/zynq/slcr.c | |
| parent | 529a8d05ff848e7bfd6049c99210557aa5e31d39 (diff) | |
| parent | e158665c1e4c4665302f0d95e26b7c7e6b70a83c (diff) | |
Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'
Diffstat (limited to 'arch/arm/cpu/armv7/zynq/slcr.c')
| -rw-r--r-- | arch/arm/cpu/armv7/zynq/slcr.c | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/arch/arm/cpu/armv7/zynq/slcr.c b/arch/arm/cpu/armv7/zynq/slcr.c index b4c11c324c..d7c1882332 100644 --- a/arch/arm/cpu/armv7/zynq/slcr.c +++ b/arch/arm/cpu/armv7/zynq/slcr.c @@ -8,6 +8,7 @@ #include <asm/io.h> #include <malloc.h> #include <asm/arch/hardware.h> +#include <asm/arch/clk.h> #define SLCR_LOCK_MAGIC 0x767B #define SLCR_UNLOCK_MAGIC 0xDF0D @@ -50,8 +51,10 @@ void zynq_slcr_cpu_reset(void) } /* Setup clk for network */ -void zynq_slcr_gem_clk_setup(u32 gem_id, u32 rclk, u32 clk) +void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate) { + int ret; + zynq_slcr_unlock(); if (gem_id > 1) { @@ -59,16 +62,16 @@ void zynq_slcr_gem_clk_setup(u32 gem_id, u32 rclk, u32 clk) goto out; } + ret = zynq_clk_set_rate(gem0_clk + gem_id, clk_rate); + if (ret) + goto out; + if (gem_id) { - /* Set divisors for appropriate frequency in GEM_CLK_CTRL */ - writel(clk, &slcr_base->gem1_clk_ctrl); /* Configure GEM_RCLK_CTRL */ - writel(rclk, &slcr_base->gem1_rclk_ctrl); + writel(1, &slcr_base->gem1_rclk_ctrl); } else { - /* Set divisors for appropriate frequency in GEM_CLK_CTRL */ - writel(clk, &slcr_base->gem0_clk_ctrl); /* Configure GEM_RCLK_CTRL */ - writel(rclk, &slcr_base->gem0_rclk_ctrl); + writel(1, &slcr_base->gem0_rclk_ctrl); } udelay(100000); out: |