diff options
| author | Albert ARIBAUD \(3ADEV\) <albert.aribaud@3adev.fr> | 2015-01-16 09:09:47 +0100 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2015-01-29 12:00:50 -0500 |
| commit | 168f594765cb4692362e6e552c272c034e7efd88 (patch) | |
| tree | fb96e1e56e7f863a91d3d45f6c1d123aef4bccf4 /arch/arm/cpu/armv7 | |
| parent | 8dcd1b720e5c44bb4ca6f41181f3b937ae6e08c1 (diff) | |
omap3: enable GP9 timer and UART2
These are needed for the upcoming Cairo board support.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
Diffstat (limited to 'arch/arm/cpu/armv7')
| -rw-r--r-- | arch/arm/cpu/armv7/omap3/clock.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c index 529ad9a942..006969e780 100644 --- a/arch/arm/cpu/armv7/omap3/clock.c +++ b/arch/arm/cpu/armv7/omap3/clock.c @@ -732,11 +732,20 @@ void per_clocks_enable(void) setbits_le32(&prcm_base->iclken_per, 0x08); /* ICKen GPT2 */ setbits_le32(&prcm_base->fclken_per, 0x08); /* FCKen GPT2 */ + /* Enable GP9 timer. */ + setbits_le32(&prcm_base->clksel_per, 0x80); /* GPT9 = 32kHz clk */ + setbits_le32(&prcm_base->iclken_per, 0x400); /* ICKen GPT9 */ + setbits_le32(&prcm_base->fclken_per, 0x400); /* FCKen GPT9 */ + #ifdef CONFIG_SYS_NS16550 /* Enable UART1 clocks */ setbits_le32(&prcm_base->fclken1_core, 0x00002000); setbits_le32(&prcm_base->iclken1_core, 0x00002000); + /* Enable UART2 clocks */ + setbits_le32(&prcm_base->fclken1_core, 0x00004000); + setbits_le32(&prcm_base->iclken1_core, 0x00004000); + /* UART 3 Clocks */ setbits_le32(&prcm_base->fclken_per, 0x00000800); setbits_le32(&prcm_base->iclken_per, 0x00000800); |