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authorSimon Glass <sjg@chromium.org>2016-06-19 19:43:02 -0600
committerTom Rini <trini@konsulko.com>2016-07-14 18:33:10 -0400
commit6b424611a8dee0444459c0c205a9d72f65f61456 (patch)
treeed61f6aeb018e77aa12ebd7afdb0fc338181438e /arch/arm/cpu/armv7
parent397b5697ad242408979a00dda14138aa1439f52b (diff)
arm: Don't invalidate unaligned cache regions
At present armv7 will unhappily invalidate a cache region and print an error message. Make it skip the operation instead, as it does with other cache operations. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch/arm/cpu/armv7')
-rw-r--r--arch/arm/cpu/armv7/cache_v7.c23
1 files changed, 2 insertions, 21 deletions
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index 2b6312099d..52f18565db 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -44,27 +44,8 @@ static void v7_dcache_inval_range(u32 start, u32 stop, u32 line_len)
{
u32 mva;
- /*
- * If start address is not aligned to cache-line do not
- * invalidate the first cache-line
- */
- if (start & (line_len - 1)) {
- printf("ERROR: %s - start address is not aligned - 0x%08x\n",
- __func__, start);
- /* move to next cache line */
- start = (start + line_len - 1) & ~(line_len - 1);
- }
-
- /*
- * If stop address is not aligned to cache-line do not
- * invalidate the last cache-line
- */
- if (stop & (line_len - 1)) {
- printf("ERROR: %s - stop address is not aligned - 0x%08x\n",
- __func__, stop);
- /* align to the beginning of this cache line */
- stop &= ~(line_len - 1);
- }
+ if (!check_cache_range(start, stop))
+ return;
for (mva = start; mva < stop; mva = mva + line_len) {
/* DCIMVAC - Invalidate data cache by MVA to PoC */