diff options
| author | Priyanka Jain <priyanka.jain@nxp.com> | 2017-04-27 15:08:06 +0530 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-05-23 09:40:23 -0700 |
| commit | e809e747996b00acd0ffc833999e97a3a21ddfac (patch) | |
| tree | e62a9b5249c07df67dba198d2bdf6943a93fae14 /arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc | |
| parent | 89a168f776cbc15a2ff1f25a0f4e54f9bbaffdec (diff) | |
armv8: fsl-layerscape: Add NXP LS2081A, LS2041A SoC support
The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and
is built on layerscape architecture. It is 40-pin derivative of
LS2084A (non-AIOP personality of LS2088A). So feature-wise it is
same as LS2084A. LS2041A is a 4-core personality of LS2081A.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc index c7496c02f5..3ae16ae7ad 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc +++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc @@ -5,6 +5,7 @@ SoC overview 3. LS1012A 4. LS1046A 5. LS2088A + 6. LS2081A LS1043A --------- @@ -227,3 +228,13 @@ LS2088A SoC has 3 more similar SoC personalities 3)LS2044A, few difference w.r.t. LS2084A: a) Four 64-bit ARM v8 Cortex-A72 CPUs + +LS2081A +-------- +LS2081A is 40-pin derivative of LS2084A. +So feature-wise it is same as LS2084A. +Refer to LS2084A(LS2088A) section above for details. + +It has one more similar SoC personality +1)LS2041A, few difference w.r.t. LS2081A: + a) Four 64-bit ARM v8 Cortex-A72 CPUs |