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authorMichael Walle <michael@walle.cc>2020-06-01 21:53:28 +0200
committerPriyanka Jain <priyanka.jain@nxp.com>2020-07-27 14:16:27 +0530
commit2eca7b97046e96e5cde4431b6635e0b4173b3e40 (patch)
tree98b34d01ac9e0f408ccc29d62b458a99dcc59372 /arch/arm/cpu/armv8/fsl-layerscape
parentf6c62f1c9e11dd01cc76ce53709679b22678a8ec (diff)
armv8: layerscape: load function pointer using ADR
Don't use LDR to load a pointer to a function. This will generate a literal which cannot be relocated. Use ADR which is PC-relative and therefore can easily be relocated. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape')
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/spintable.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spintable.S b/arch/arm/cpu/armv8/fsl-layerscape/spintable.S
index d71ec13eaf..ac9c622aee 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spintable.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spintable.S
@@ -57,11 +57,11 @@ ENTRY(secondary_boot_func)
* table (each elem is padded to 64 bytes)
*/
lsl x1, x10, #6
- ldr x0, =__spin_table
+ adr x0, __spin_table
/* physical address of this cpus spin table element */
add x11, x1, x0
- ldr x0, =__real_cntfrq
+ adr x0, __real_cntfrq
ldr x0, [x0]
msr cntfrq_el0, x0 /* set with real frequency */
str x9, [x11, #16] /* LPID */
@@ -117,7 +117,7 @@ ENTRY(secondary_switch_to_el1)
orr x10, x2, x1, lsl #2 /* x10 has LPID */
lsl x1, x10, #6
- ldr x0, =__spin_table
+ adr x0, __spin_table
/* physical address of this cpus spin table element */
add x11, x1, x0