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| author | Thomas Schaefer <thomas.schaefer@kontron.com> | 2019-08-08 16:00:30 +0800 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2019-09-12 16:15:42 +0530 |
| commit | 0490cab58407afc23df4fbc05204c23395efd3fe (patch) | |
| tree | 735120c061fb9ac67ac4acf15946a7f245418ebd /arch/arm/cpu/armv8/lowlevel_init.S | |
| parent | a3ce94b6024b93e7ab2ceaf7a6dc08c590bb3f5a (diff) | |
armv8: ls1028a: configure PMU's PCTBENR to enable WDT
The SP805-WDT module on LS1028A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.
Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv8/lowlevel_init.S')
0 files changed, 0 insertions, 0 deletions