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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-06-27 19:31:05 +0900
committerTom Rini <trini@konsulko.com>2016-07-14 18:22:16 -0400
commit6b6024eadb96bc471643bd183fe940fb657bef83 (patch)
tree35c09153ac815289e395ddbf7678587c0232c114 /arch/arm/cpu/armv8/spin_table.c
parent3a592a1349ac3961b0f4f2db0a8d9f128225d897 (diff)
arm64: add better and more generic spin-table support
There are two enable methods supported by ARM64 Linux; psci and spin-table. The latter is simpler and helpful for quick SoC bring up. My main motivation for this patch is to improve the spin-table support, which allows us to boot an ARMv8 system without the ARM Trusted Firmware. Currently, we have multi-entry code in arch/arm/cpu/armv8/start.S and the spin-table is supported in a really ad-hoc way, and I see some problems: - We must hard-code CPU_RELEASE_ADDR so that it matches the "cpu-release-addr" property in the DT that comes from the kernel tree. - The Documentation/arm64/booting.txt in Linux requires that the release address must be zero-initialized, but it is not cared by the common code in U-Boot. We must do it in a board function. - There is no systematic way to protect the spin-table code from the kernel. We are supposed to do it in a board specific manner, but it is difficult to predict where the spin-table code will be located after the relocation. So, it also makes difficult to hard-code /memreserve/ in the DT of the kernel. So, here is a patch to solve those problems; the DT is run-time modified to reserve the spin-table code (+ cpu-release-addr). Also, the "cpu-release-addr" property is set to an appropriate address after the relocation, which means we no longer need the hard-coded CPU_RELEASE_ADDR. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/cpu/armv8/spin_table.c')
-rw-r--r--arch/arm/cpu/armv8/spin_table.c63
1 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/spin_table.c b/arch/arm/cpu/armv8/spin_table.c
new file mode 100644
index 0000000000..ec1c9b8ddb
--- /dev/null
+++ b/arch/arm/cpu/armv8/spin_table.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <libfdt.h>
+#include <asm/spin_table.h>
+
+int spin_table_update_dt(void *fdt)
+{
+ int cpus_offset, offset;
+ const char *prop;
+ int ret;
+ unsigned long rsv_addr = (unsigned long)&spin_table_reserve_begin;
+ unsigned long rsv_size = &spin_table_reserve_end -
+ &spin_table_reserve_begin;
+
+ cpus_offset = fdt_path_offset(fdt, "/cpus");
+ if (cpus_offset < 0)
+ return -ENODEV;
+
+ for (offset = fdt_first_subnode(fdt, cpus_offset);
+ offset >= 0;
+ offset = fdt_next_subnode(fdt, offset)) {
+ prop = fdt_getprop(fdt, offset, "device_type", NULL);
+ if (!prop || strcmp(prop, "cpu"))
+ continue;
+
+ /*
+ * In the first loop, we check if every CPU node specifies
+ * spin-table. Otherwise, just return successfully to not
+ * disturb other methods, like psci.
+ */
+ prop = fdt_getprop(fdt, offset, "enable-method", NULL);
+ if (!prop || strcmp(prop, "spin-table"))
+ return 0;
+ }
+
+ for (offset = fdt_first_subnode(fdt, cpus_offset);
+ offset >= 0;
+ offset = fdt_next_subnode(fdt, offset)) {
+ prop = fdt_getprop(fdt, offset, "device_type", NULL);
+ if (!prop || strcmp(prop, "cpu"))
+ continue;
+
+ ret = fdt_setprop_u64(fdt, offset, "cpu-release-addr",
+ (unsigned long)&spin_table_cpu_release_addr);
+ if (ret)
+ return -ENOSPC;
+ }
+
+ ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size);
+ if (ret)
+ return -ENOSPC;
+
+ printf(" Reserved memory region for spin-table: addr=%lx size=%lx\n",
+ rsv_addr, rsv_size);
+
+ return 0;
+}