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authorAnders Hedlund <anders.j.hedlund@gmail.com>2017-12-19 17:24:41 +0100
committerMichal Simek <michal.simek@xilinx.com>2018-01-30 14:28:40 +0100
commit501fbc6744edbf607329f36c378abbab53cdc8f4 (patch)
tree6cb18720340ec6f9e7a5ada56dd162b2b597963f /arch/arm/cpu/armv8/zynqmp
parent01c42d3d74cd51fd04da297898015d6b1ca00b28 (diff)
armv8: zynqmp: Map PCIe High as device memory
Set the 8GB PCIe High area as device memory. Also extend the DDR High area to cover the full 32GB range. Signed-off-by: Anders Hedlund <anders.j.hedlund@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/cpu/armv8/zynqmp')
-rw-r--r--arch/arm/cpu/armv8/zynqmp/cpu.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c
index f026cb4511..4596d6bff4 100644
--- a/arch/arm/cpu/armv8/zynqmp/cpu.c
+++ b/arch/arm/cpu/armv8/zynqmp/cpu.c
@@ -48,20 +48,20 @@ static struct mm_region zynqmp_mem_map[] = {
#endif
.virt = 0x400000000UL,
.phys = 0x400000000UL,
- .size = 0x200000000UL,
+ .size = 0x400000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
- .virt = 0x600000000UL,
- .phys = 0x600000000UL,
+ .virt = 0x800000000UL,
+ .phys = 0x800000000UL,
.size = 0x800000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
- .virt = 0xe00000000UL,
- .phys = 0xe00000000UL,
- .size = 0xf200000000UL,
+ .virt = 0x1000000000UL,
+ .phys = 0x1000000000UL,
+ .size = 0xf000000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN