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| author | Michal Simek <michal.simek@xilinx.com> | 2017-02-15 09:10:16 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2017-06-19 16:53:09 +0200 |
| commit | bd89fba2024305ae301fa7df80848b8d3e13efaf (patch) | |
| tree | 95197c848be9a9ae110d30f4a119a75ca381c838 /arch/arm/cpu/armv8/zynqmp | |
| parent | 41f59f6853915291c7451c9e38c196fd5a90bf6a (diff) | |
arm64: zynqmp: Wire SD1 level shifter mode to SPL
Add missing SD boot mode to SPL. zcu102-rev1.0 is supporting
this boot mode.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/cpu/armv8/zynqmp')
| -rw-r--r-- | arch/arm/cpu/armv8/zynqmp/spl.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c index 0a5f4306e8..7b78d23cf8 100644 --- a/arch/arm/cpu/armv8/zynqmp/spl.c +++ b/arch/arm/cpu/armv8/zynqmp/spl.c @@ -83,6 +83,7 @@ u32 spl_boot_device(void) case JTAG_MODE: return BOOT_DEVICE_RAM; #ifdef CONFIG_SPL_MMC_SUPPORT + case SD1_LSHFT_MODE: case EMMC_MODE: case SD_MODE: case SD_MODE1: |