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| author | Tom Rini <trini@konsulko.com> | 2020-05-11 09:46:43 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-05-11 09:46:43 -0400 |
| commit | 1bccb23b7bb67e029cc6b22bf7d25243ef71c43c (patch) | |
| tree | 9fe0b6397d88359177131348a077aad28836285d /arch/arm/cpu/armv8 | |
| parent | 951db64186b2b9ad2e3ee30e2093deea005bdd8a (diff) | |
| parent | d52a03b130565e6b01dcbe656ebeb611d5ee1aa1 (diff) | |
Merge tag 'u-boot-imx-20200511' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
i.MX for 2020.07
----------------
- i.MX NAND and nandbxb for i.MX8M
- imx8MM : new beacon devkit
- imx8MQ : new pico-imx8MQ
- imx8QXP : extend to enable M4, fixes
- add thermal support
- caches in SPL (missing board)
- Fixes
Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/685391011
Diffstat (limited to 'arch/arm/cpu/armv8')
| -rw-r--r-- | arch/arm/cpu/armv8/Kconfig | 6 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/Makefile | 4 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/spl_data.c | 29 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/u-boot-spl.lds | 8 |
4 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 16c83e8614..3655990772 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -76,6 +76,12 @@ config SPL_ARMV8_SEC_FIRMWARE_SUPPORT help Say Y here to support this framework in SPL phase. +config SPL_RECOVER_DATA_SECTION + bool "save/restore SPL data section" + help + Say Y here to save SPL data section for cold boot, and restore + at warm boot in SPL phase. + config SEC_FIRMWARE_ARMV8_PSCI bool "PSCI implementation in secure monitor firmware" depends on ARMV8_SEC_FIRMWARE_SUPPORT || SPL_ARMV8_SEC_FIRMWARE_SUPPORT diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index b349b13f49..2e48df0eb9 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -30,6 +30,10 @@ obj-$(CONFIG_ARMV8_SPIN_TABLE) += spin_table.o spin_table_v8.o endif obj-$(CONFIG_$(SPL_)ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o +ifdef CONFIG_SPL_BUILD +obj-$(CONFIG_SPL_RECOVER_DATA_SECTION) += spl_data.o +endif + obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/ obj-$(CONFIG_S32V234) += s32v234/ obj-$(CONFIG_TARGET_HIKEY) += hisilicon/ diff --git a/arch/arm/cpu/armv8/spl_data.c b/arch/arm/cpu/armv8/spl_data.c new file mode 100644 index 0000000000..8fd986a67a --- /dev/null +++ b/arch/arm/cpu/armv8/spl_data.c @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2020 NXP + */ + +#include <common.h> +#include <spl.h> + +char __data_save_start[0] __section(.__data_save_start); +char __data_save_end[0] __section(.__data_save_end); + +u32 cold_reboot_flag = 1; + +void spl_save_restore_data(void) +{ + u32 data_size = __data_save_end - __data_save_start; + + if (cold_reboot_flag == 1) { + /* Save data section to data_save section */ + memcpy(__data_save_start, __data_save_start - data_size, + data_size); + } else { + /* Restore the data_save section to data section */ + memcpy(__data_save_start - data_size, __data_save_start, + data_size); + } + + cold_reboot_flag++; +} diff --git a/arch/arm/cpu/armv8/u-boot-spl.lds b/arch/arm/cpu/armv8/u-boot-spl.lds index ccbf359bd1..0e67ab09d7 100644 --- a/arch/arm/cpu/armv8/u-boot-spl.lds +++ b/arch/arm/cpu/armv8/u-boot-spl.lds @@ -38,6 +38,14 @@ SECTIONS *(.data*) } >.sram +#ifdef CONFIG_SPL_RECOVER_DATA_SECTION + .data_save : { + *(.__data_save_start) + . = SIZEOF(.data); + *(.__data_save_end) + } >.sram +#endif + .u_boot_list : { . = ALIGN(8); KEEP(*(SORT(.u_boot_list*))); |