diff options
| author | Michael Schwingen <michael@schwingen.org> | 2011-05-23 00:00:00 +0200 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-06-23 08:24:55 +0200 |
| commit | ce04bb41a60b87236ff5294a7508ebb5afc014e4 (patch) | |
| tree | 283dab38709b0618948f5bc975487dcd28cff76b /arch/arm/cpu/ixp/start.S | |
| parent | 009e464802569bc97c03c52f76fdf7e38040b634 (diff) | |
Fix IXP code to work after relocation was added
- jump to real flash location after reset before turning off flash mirror
- fix timer system to use HZ == 1000, remove broken interrupt-based code
Signed-off-by: Michael Schwingen <michael@schwingen.org>
Diffstat (limited to 'arch/arm/cpu/ixp/start.S')
| -rw-r--r-- | arch/arm/cpu/ixp/start.S | 59 |
1 files changed, 5 insertions, 54 deletions
diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index 561c1f4795..faa9a8ff99 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -65,7 +65,8 @@ .endm .globl _start -_start: b reset +_start: + ldr pc, _reset ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -74,6 +75,7 @@ _start: b reset ldr pc, _irq ldr pc, _fiq +_reset: .word reset _undefined_instruction: .word undefined_instruction _software_interrupt: .word software_interrupt _prefetch_abort: .word prefetch_abort @@ -167,12 +169,6 @@ reset: str r1, [r2] /* make sure flash is visible at 0 */ -#if 0 - ldr r2, =IXP425_EXP_CFG0 - ldr r1, [r2] - orr r1, r1, #0x80000000 - str r1, [r2] -#endif mov r1, #CONFIG_SYS_SDR_CONFIG ldr r2, =IXP425_SDR_CONFIG str r1, [r2] @@ -216,19 +212,6 @@ reset: str r1, [r4] DELAY_FOR 0x4000, r0 - /* copy */ - mov r0, #0 - mov r4, r0 - add r2, r0, #CONFIG_SYS_MONITOR_LEN - mov r1, #0x10000000 - mov r5, r1 - - 30: - ldr r3, [r0], #4 - str r3, [r1], #4 - cmp r0, r2 - bne 30b - /* invalidate I & D caches & BTB */ mcr p15, 0, r0, c7, c7, 0 CPWAIT r0 @@ -241,19 +224,12 @@ reset: mcr p15, 0, r0, c7, c10, 4 CPWAIT r0 - /* move flash to 0x50000000 */ + /* remove flash mirror at 0x00000000 */ ldr r2, =IXP425_EXP_CFG0 ldr r1, [r2] bic r1, r1, #0x80000000 str r1, [r2] - nop - nop - nop - nop - nop - nop - /* invalidate I & Data TLB */ mcr p15, 0, r0, c8, c7, 0 CPWAIT r0 @@ -269,7 +245,7 @@ reset: orr r0,r0,#0x13 msr cpsr,r0 -/* Set stackpointer in internal RAM to call board_init_f */ +/* Set initial stackpointer in SDRAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ @@ -580,28 +556,3 @@ reset_endless: b reset_endless -#ifdef CONFIG_USE_IRQ - -.LC0: .word loops_per_jiffy - -/* - * 0 <= r0 <= 2000 - */ -.globl __udelay -__udelay: - mov r2, #0x6800 - orr r2, r2, #0x00db - mul r0, r2, r0 - ldr r2, .LC0 - ldr r2, [r2] @ max = 0x0fffffff - mov r0, r0, lsr #11 @ max = 0x00003fff - mov r2, r2, lsr #11 @ max = 0x0003ffff - mul r0, r2, r0 @ max = 2^32-1 - movs r0, r0, lsr #6 - -delay_loop: - subs r0, r0, #1 - bne delay_loop - mov pc, lr - -#endif /* CONFIG_USE_IRQ */ |