diff options
author | Tom Warren <twarren@nvidia.com> | 2013-03-25 16:22:26 -0700 |
---|---|---|
committer | Tom Warren <twarren@nvidia.com> | 2013-04-15 11:01:38 -0700 |
commit | d0edce4fa394325a0ccfd38a5d668fb5ee1af34d (patch) | |
tree | 5a7ea0c182d9b2c33699fcfff230f83ba7b4ff84 /arch/arm/cpu/tegra-common/Makefile | |
parent | 85434f9d7123c283b2233614178e7cfc968d329b (diff) |
Tegra: Configure L2 cache control reg properly.
Without this change, kernel fails at calling function cache_clean_flush
during kernel early boot.
Aprocryphally, intended for T114 only, so I check for a T114 SoC.
Works (i.e. dalmore 3.8 kernel now starts printing to console).
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/tegra-common/Makefile')
-rw-r--r-- | arch/arm/cpu/tegra-common/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/tegra-common/Makefile b/arch/arm/cpu/tegra-common/Makefile index 8e95c7ee1d..4e0301c66a 100644 --- a/arch/arm/cpu/tegra-common/Makefile +++ b/arch/arm/cpu/tegra-common/Makefile @@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)libcputegra-common.o SOBJS += lowlevel_init.o -COBJS-y += ap.o board.o sys_info.o timer.o clock.o +COBJS-y += ap.o board.o sys_info.o timer.o clock.o cache.o SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y)) |