summaryrefslogtreecommitdiff
path: root/arch/arm/cpu/tegra-common/vpr.c
diff options
context:
space:
mode:
authorTom Rini <trini@ti.com>2014-08-29 11:07:10 -0400
committerTom Rini <trini@ti.com>2014-08-29 11:07:10 -0400
commit5ddc329341a9a143f0567494e5f874008b22e1a7 (patch)
treef3876e495e2b8a9f222edb88fa1c610e6639d68b /arch/arm/cpu/tegra-common/vpr.c
parent5a1095a830299aef8dd32495e505e92ab1749e89 (diff)
parenta78cf41e79f64fe90f573b07ee3c88be533b97ca (diff)
Merge branch 'master' of git://git.denx.de/u-boot-tegra
Diffstat (limited to 'arch/arm/cpu/tegra-common/vpr.c')
-rw-r--r--arch/arm/cpu/tegra-common/vpr.c35
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/cpu/tegra-common/vpr.c b/arch/arm/cpu/tegra-common/vpr.c
new file mode 100644
index 0000000000..f695811c9b
--- /dev/null
+++ b/arch/arm/cpu/tegra-common/vpr.c
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* Tegra vpr routines */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/tegra.h>
+#include <asm/arch/mc.h>
+
+/* Configures VPR. Right now, all we do is turn it off. */
+void config_vpr(void)
+{
+ struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
+
+ /* Turn VPR off */
+ writel(0, &mc->mc_video_protect_size_mb);
+ writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
+ &mc->mc_video_protect_reg_ctrl);
+ /* read back to ensure the write went through */
+ readl(&mc->mc_video_protect_reg_ctrl);
+}