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authorTom Warren <twarren@nvidia.com>2012-09-04 17:00:24 -0700
committerTom Warren <twarren@nvidia.com>2012-09-10 13:01:24 -0700
commit29f3e3f24832fccdd7ce5fa961bc4d4005b07381 (patch)
tree28c89e24dca02035354f888fb83311217f54d20f /arch/arm/cpu/tegra20-common/ap20.c
parent22e73940216ef971c71c49e959519db8babc876a (diff)
Tegra: Change Tegra20 to Tegra in common code, prep for T30
Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate. Convert tegra20_ source file and function names to tegra_, also. Upcoming Tegra30 port will use common code/defines/names where possible. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/tegra20-common/ap20.c')
-rw-r--r--arch/arm/cpu/tegra20-common/ap20.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/cpu/tegra20-common/ap20.c b/arch/arm/cpu/tegra20-common/ap20.c
index 00588dae52..c0ca6eb379 100644
--- a/arch/arm/cpu/tegra20-common/ap20.c
+++ b/arch/arm/cpu/tegra20-common/ap20.c
@@ -32,7 +32,7 @@
int tegra_get_chip_type(void)
{
struct apb_misc_gp_ctlr *gp;
- struct fuse_regs *fuse = (struct fuse_regs *)TEGRA20_FUSE_BASE;
+ struct fuse_regs *fuse = (struct fuse_regs *)NV_PA_FUSE_BASE;
uint tegra_sku_id, rev;
/*
@@ -40,7 +40,7 @@ int tegra_get_chip_type(void)
* APB_MISC + 0x804, and has value 0x20 for Tegra20, 0x30 for
* Tegra30
*/
- gp = (struct apb_misc_gp_ctlr *)TEGRA20_APB_MISC_GP_BASE;
+ gp = (struct apb_misc_gp_ctlr *)NV_PA_APB_MISC_GP_BASE;
rev = (readl(&gp->hidrev) & HIDREV_CHIPID_MASK) >> HIDREV_CHIPID_SHIFT;
tegra_sku_id = readl(&fuse->sku_info) & 0xff;
@@ -101,7 +101,7 @@ static u32 get_odmdata(void)
static void init_pmc_scratch(void)
{
- struct pmc_ctlr *const pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE;
+ struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
u32 odmdata;
int i;