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authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>2020-04-28 10:19:31 +0800
committerPriyanka Jain <priyanka.jain@nxp.com>2020-04-28 17:46:46 +0530
commit0d5b0711e91485b26f644446da17fc69039f08d6 (patch)
treed47cdc86b578b36ca73c2141d9baeb89f7c1410c /arch/arm/cpu
parent90ae271393ba61701237ac81d996dfafaccf4e2f (diff)
fsl-layerscape: Kconfig: Select RESV_RAM if GIC_V3_ITS
The GIC redistributor tables initialization depends on RESV_RAM config, so select RESV_RAM if GIC_V3_ITS is enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index b25639183f..2f75b2cdd3 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -46,6 +46,7 @@ config ARCH_LS1028A
select SYS_FSL_ERRATUM_A009663 if !TFABOOT
select SYS_FSL_ERRATUM_A009942 if !TFABOOT
select SYS_FSL_ERRATUM_A050382
+ select RESV_RAM if GIC_V3_ITS
imply PANIC_HANG
config ARCH_LS1043A
@@ -152,6 +153,7 @@ config ARCH_LS1088A
select SYS_I2C_MXC_I2C2 if !TFABOOT
select SYS_I2C_MXC_I2C3 if !TFABOOT
select SYS_I2C_MXC_I2C4 if !TFABOOT
+ select RESV_RAM if GIC_V3_ITS
imply SCSI
imply PANIC_HANG
@@ -202,6 +204,7 @@ config ARCH_LS2080A
select SYS_I2C_MXC_I2C2 if !TFABOOT
select SYS_I2C_MXC_I2C3 if !TFABOOT
select SYS_I2C_MXC_I2C4 if !TFABOOT
+ select RESV_RAM if GIC_V3_ITS
imply DISTRO_DEFAULTS
imply PANIC_HANG
@@ -229,6 +232,7 @@ config ARCH_LX2160A
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
select SYS_I2C_MXC
+ select RESV_RAM if GIC_V3_ITS
imply DISTRO_DEFAULTS
imply PANIC_HANG
imply SCSI