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authorYe Li <ye.li@nxp.com>2017-04-05 10:36:58 +0800
committerStefano Babic <sbabic@denx.de>2017-04-12 18:45:10 +0200
commit2018ef868c1faf6231b8aeb6d0427f139923a9a6 (patch)
tree868a2e939e104611d72c77210d2eec6e4388801e /arch/arm/cpu
parentb69999efd8c6c6a1246234b1d06375d00149fde5 (diff)
imx: mx7ulp: Fix SPLL/APLL clock rate calculation issue
The num/denom is a float value, but in the calculation it is convert to integer 0, and wrong result. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/armv7/mx7ulp/scg.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/mx7ulp/scg.c b/arch/arm/cpu/armv7/mx7ulp/scg.c
index ca8252d0d2..c117af0a0e 100644
--- a/arch/arm/cpu/armv7/mx7ulp/scg.c
+++ b/arch/arm/cpu/armv7/mx7ulp/scg.c
@@ -504,7 +504,9 @@ u32 decode_pll(enum pll_clocks pll)
num = readl(&scg1_regs->spllnum);
denom = readl(&scg1_regs->splldenom);
- return (infreq / pre_div) * (mult + num / denom);
+ infreq = infreq / pre_div;
+
+ return infreq * mult + infreq * num / denom;
case PLL_A7_APLL:
reg = readl(&scg1_regs->apllcsr);
@@ -531,7 +533,9 @@ u32 decode_pll(enum pll_clocks pll)
num = readl(&scg1_regs->apllnum);
denom = readl(&scg1_regs->aplldenom);
- return (infreq / pre_div) * (mult + num / denom);
+ infreq = infreq / pre_div;
+
+ return infreq * mult + infreq * num / denom;
case PLL_USB:
reg = readl(&scg1_regs->upllcsr);