diff options
| author | Stephen Warren <swarren@nvidia.com> | 2014-01-24 10:16:19 -0700 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2014-02-03 09:46:45 -0700 |
| commit | 9cb0c6dc6928864c981f4cb9f20cc72ef7b8ff38 (patch) | |
| tree | 8f1713f5a05037b3b8ae4f1306ebaa4763fcb6d0 /arch/arm/cpu | |
| parent | 5916a36ee99196efa97902471f7e2e725f4aa235 (diff) | |
ARM: tegra: rename OUT_CLK_SOURCE_*
OUT_CLK_SOURCE_ are currently named after the number of bits the mask
they represent includes. However, bit count is not the only possible
variable; bit position may also vary. Rename OUT_CLK_SOURCE_ to
OUT_CLK_SOURCE_31_30_ and OUT_CLK_SOURCE4_ to OUT_CLK_SOURCE_31_28 to
more completely describe exactly what they represent, without having to
go look up the definitions.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/tegra-common/clock.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/cpu/tegra-common/clock.c b/arch/arm/cpu/tegra-common/clock.c index 268fb912b5..d9f2c767d5 100644 --- a/arch/arm/cpu/tegra-common/clock.c +++ b/arch/arm/cpu/tegra-common/clock.c @@ -142,8 +142,8 @@ void clock_ll_set_source_divisor(enum periph_id periph_id, unsigned source, value = readl(reg); - value &= ~OUT_CLK_SOURCE_MASK; - value |= source << OUT_CLK_SOURCE_SHIFT; + value &= ~OUT_CLK_SOURCE_31_30_MASK; + value |= source << OUT_CLK_SOURCE_31_30_SHIFT; value &= ~OUT_CLK_DIVISOR_MASK; value |= divisor << OUT_CLK_DIVISOR_SHIFT; @@ -155,8 +155,8 @@ void clock_ll_set_source(enum periph_id periph_id, unsigned source) { u32 *reg = get_periph_source_reg(periph_id); - clrsetbits_le32(reg, OUT_CLK_SOURCE_MASK, - source << OUT_CLK_SOURCE_SHIFT); + clrsetbits_le32(reg, OUT_CLK_SOURCE_31_30_MASK, + source << OUT_CLK_SOURCE_31_30_SHIFT); } /** @@ -305,11 +305,11 @@ static int adjust_periph_pll(enum periph_id periph_id, int source, if (source < 0) return -1; if (mux_bits == 4) { - clrsetbits_le32(reg, OUT_CLK_SOURCE4_MASK, - source << OUT_CLK_SOURCE4_SHIFT); + clrsetbits_le32(reg, OUT_CLK_SOURCE_31_28_MASK, + source << OUT_CLK_SOURCE_31_28_SHIFT); } else { - clrsetbits_le32(reg, OUT_CLK_SOURCE_MASK, - source << OUT_CLK_SOURCE_SHIFT); + clrsetbits_le32(reg, OUT_CLK_SOURCE_31_30_MASK, + source << OUT_CLK_SOURCE_31_30_SHIFT); } udelay(2); return 0; |