arm: at91: add at91sam9n12ek board support

Add support for following features:
  - nand boot, with PMECC 2bit ECC for 512 bytes sector
  - SPI flash boot
  - SD card boot
  - LCD support

Signed-off-by: Josh Wu <josh.wu@atmel.com>
[fix -Wimplicit-function-declaration for at91_lcd_hw_init()]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

3 files changed, 180 insertions, 2 deletions

diff --git a/arch/arm/cpu/arm926ejs/at91/Makefile b/arch/arm/cpu/arm926ejs/at91/Makefile
index 346e58faee..c4408f6c9d 100644
--- a/arch/arm/cpu/arm926ejs/at91/Makefile
+++ b/arch/arm/cpu/arm926ejs/at91/Makefile
@@ -35,6 +35,7 @@ COBJS-$(CONFIG_AT91SAM9263)	+= at91sam9263_devices.o
 COBJS-$(CONFIG_AT91SAM9RL)	+= at91sam9rl_devices.o
 COBJS-$(CONFIG_AT91SAM9M10G45)	+= at91sam9m10g45_devices.o
 COBJS-$(CONFIG_AT91SAM9G45)	+= at91sam9m10g45_devices.o
+COBJS-$(CONFIG_AT91SAM9N12)	+= at91sam9n12_devices.o
 COBJS-$(CONFIG_AT91SAM9X5)	+= at91sam9x5_devices.o
 COBJS-$(CONFIG_AT91_EFLASH)	+= eflash.o
 COBJS-$(CONFIG_AT91_LED)	+= led.o
diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c
new file mode 100644
index 0000000000..6eaeac0fc2
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c
@@ -0,0 +1,177 @@
+/*
+ * (C) Copyright 2013 Atmel Corporation
+ * Josh Wu <josh.wu@atmel.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_pio.h>
+
+unsigned int has_lcdc()
+{
+	return 1;
+}
+
+void at91_serial0_hw_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	at91_set_a_periph(AT91_PIO_PORTA, 0, 1);		/* TXD0 */
+	at91_set_a_periph(AT91_PIO_PORTA, 1, 0);		/* RXD0 */
+	writel(1 << ATMEL_ID_USART0, &pmc->pcer);
+}
+
+void at91_serial1_hw_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	at91_set_a_periph(AT91_PIO_PORTA, 5, 1);		/* TXD1 */
+	at91_set_a_periph(AT91_PIO_PORTA, 6, 0);		/* RXD1 */
+	writel(1 << ATMEL_ID_USART1, &pmc->pcer);
+}
+
+void at91_serial2_hw_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	at91_set_a_periph(AT91_PIO_PORTA, 7, 1);		/* TXD2 */
+	at91_set_a_periph(AT91_PIO_PORTA, 8, 0);		/* RXD2 */
+	writel(1 << ATMEL_ID_USART2, &pmc->pcer);
+}
+
+void at91_serial3_hw_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	at91_set_b_periph(AT91_PIO_PORTC, 22, 1);		/* TXD3 */
+	at91_set_b_periph(AT91_PIO_PORTC, 23, 0);		/* RXD3 */
+	writel(1 << ATMEL_ID_USART3, &pmc->pcer);
+}
+
+void at91_seriald_hw_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	at91_set_a_periph(AT91_PIO_PORTA, 10, 1);		/* DTXD */
+	at91_set_a_periph(AT91_PIO_PORTA, 9, 0);		/* DRXD */
+	writel(1 << ATMEL_ID_SYS, &pmc->pcer);
+}
+
+#ifdef CONFIG_ATMEL_SPI
+void at91_spi0_hw_init(unsigned long cs_mask)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	at91_set_a_periph(AT91_PIO_PORTA, 11, 0);	/* SPI0_MISO */
+	at91_set_a_periph(AT91_PIO_PORTA, 12, 0);	/* SPI0_MOSI */
+	at91_set_a_periph(AT91_PIO_PORTA, 13, 0);	/* SPI0_SPCK */
+
+	/* Enable clock */
+	writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
+
+	if (cs_mask & (1 << 0))
+		at91_set_pio_output(AT91_PIO_PORTA, 14, 1);
+	if (cs_mask & (1 << 1))
+		at91_set_pio_output(AT91_PIO_PORTA, 7, 1);
+	if (cs_mask & (1 << 2))
+		at91_set_pio_output(AT91_PIO_PORTA, 1, 1);
+	if (cs_mask & (1 << 3))
+		at91_set_pio_output(AT91_PIO_PORTB, 3, 1);
+}
+
+void at91_spi1_hw_init(unsigned long cs_mask)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	at91_set_b_periph(AT91_PIO_PORTA, 21, 0);	/* SPI1_MISO */
+	at91_set_b_periph(AT91_PIO_PORTA, 22, 0);	/* SPI1_MOSI */
+	at91_set_b_periph(AT91_PIO_PORTA, 23, 0);	/* SPI1_SPCK */
+
+	/* Enable clock */
+	writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
+
+	if (cs_mask & (1 << 0))
+		at91_set_pio_output(AT91_PIO_PORTA, 8, 1);
+	if (cs_mask & (1 << 1))
+		at91_set_pio_output(AT91_PIO_PORTA, 0, 1);
+	if (cs_mask & (1 << 2))
+		at91_set_pio_output(AT91_PIO_PORTA, 31, 1);
+	if (cs_mask & (1 << 3))
+		at91_set_pio_output(AT91_PIO_PORTA, 30, 1);
+}
+#endif
+
+void at91_mci_hw_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	at91_set_a_periph(AT91_PIO_PORTA, 17, 0);	/* MCCK */
+	at91_set_a_periph(AT91_PIO_PORTA, 16, 0);	/* MCCDA */
+	at91_set_a_periph(AT91_PIO_PORTA, 15, 0);	/* MCDA0 */
+	at91_set_a_periph(AT91_PIO_PORTA, 18, 0);	/* MCDA1 */
+	at91_set_a_periph(AT91_PIO_PORTA, 19, 0);	/* MCDA2 */
+	at91_set_a_periph(AT91_PIO_PORTA, 20, 0);	/* MCDA3 */
+
+	writel(1 << ATMEL_ID_HSMCI0, &pmc->pcer);
+}
+
+#ifdef CONFIG_LCD
+void at91_lcd_hw_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	at91_set_a_periph(AT91_PIO_PORTC, 24, 0);	/* LCDDPWR */
+	at91_set_a_periph(AT91_PIO_PORTC, 26, 0);	/* LCDVSYNC */
+	at91_set_a_periph(AT91_PIO_PORTC, 27, 0);	/* LCDHSYNC */
+	at91_set_a_periph(AT91_PIO_PORTC, 28, 0);	/* LCDDOTCK */
+	at91_set_a_periph(AT91_PIO_PORTC, 29, 0);	/* LCDDEN */
+	at91_set_a_periph(AT91_PIO_PORTC, 30, 0);	/* LCDDOTCK */
+
+	at91_set_a_periph(AT91_PIO_PORTC, 0, 0);	/* LCDD0 */
+	at91_set_a_periph(AT91_PIO_PORTC, 1, 0);	/* LCDD1 */
+	at91_set_a_periph(AT91_PIO_PORTC, 2, 0);	/* LCDD2 */
+	at91_set_a_periph(AT91_PIO_PORTC, 3, 0);	/* LCDD3 */
+	at91_set_a_periph(AT91_PIO_PORTC, 4, 0);	/* LCDD4 */
+	at91_set_a_periph(AT91_PIO_PORTC, 5, 0);	/* LCDD5 */
+	at91_set_a_periph(AT91_PIO_PORTC, 6, 0);	/* LCDD6 */
+	at91_set_a_periph(AT91_PIO_PORTC, 7, 0);	/* LCDD7 */
+	at91_set_a_periph(AT91_PIO_PORTC, 8, 0);	/* LCDD8 */
+	at91_set_a_periph(AT91_PIO_PORTC, 9, 0);	/* LCDD9 */
+	at91_set_a_periph(AT91_PIO_PORTC, 10, 0);	/* LCDD10 */
+	at91_set_a_periph(AT91_PIO_PORTC, 11, 0);	/* LCDD11 */
+	at91_set_a_periph(AT91_PIO_PORTC, 12, 0);	/* LCDD12 */
+	at91_set_a_periph(AT91_PIO_PORTC, 13, 0);	/* LCDD13 */
+	at91_set_a_periph(AT91_PIO_PORTC, 14, 0);	/* LCDD14 */
+	at91_set_a_periph(AT91_PIO_PORTC, 15, 0);	/* LCDD15 */
+	at91_set_a_periph(AT91_PIO_PORTC, 16, 0);	/* LCDD16 */
+	at91_set_a_periph(AT91_PIO_PORTC, 17, 0);	/* LCDD17 */
+	at91_set_a_periph(AT91_PIO_PORTC, 18, 0);	/* LCDD18 */
+	at91_set_a_periph(AT91_PIO_PORTC, 19, 0);	/* LCDD19 */
+	at91_set_a_periph(AT91_PIO_PORTC, 20, 0);	/* LCDD20 */
+	at91_set_a_periph(AT91_PIO_PORTC, 21, 0);	/* LCDD21 */
+	at91_set_a_periph(AT91_PIO_PORTC, 22, 0);	/* LCDD22 */
+	at91_set_a_periph(AT91_PIO_PORTC, 23, 0);	/* LCDD23 */
+
+	writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
+}
+#endif
diff --git a/arch/arm/cpu/arm926ejs/at91/clock.c b/arch/arm/cpu/arm926ejs/at91/clock.c
index f825388ae9..5b4923f3bf 100644
--- a/arch/arm/cpu/arm926ejs/at91/clock.c
+++ b/arch/arm/cpu/arm926ejs/at91/clock.c
@@ -156,7 +156,7 @@ int at91_clock_init(unsigned long main_clock)
 	 */
 	mckr = readl(&pmc->mckr);
 #if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) \
-		|| defined(CONFIG_AT91SAM9X5)
+		|| defined(CONFIG_AT91SAM9N12) || defined(CONFIG_AT91SAM9X5)
 	/* plla divisor by 2 */
 	gd->arch.plla_rate_hz /= (1 << ((mckr & 1 << 12) >> 12));
 #endif
@@ -171,7 +171,7 @@ int at91_clock_init(unsigned long main_clock)
 	if (mckr & AT91_PMC_MCKR_MDIV_MASK)
 		freq /= 2;			/* processor clock division */
 #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) \
-		|| defined(CONFIG_AT91SAM9X5)
+		|| defined(CONFIG_AT91SAM9N12) || defined(CONFIG_AT91SAM9X5)
 	/* mdiv <==> divisor
 	 *  0   <==>   1
 	 *  1   <==>   2