diff options
author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-05-16 20:43:04 +0200 |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-05-16 20:43:04 +0200 |
commit | a26acb7dc946b2fe7fa25736928878f6adf88f46 (patch) | |
tree | ec7b2197b076ecd658a68de12d7a3c03c7bf399f /arch/arm/cpu | |
parent | 6a2f30a03acbf226aeb5a93783e6172aa0682d78 (diff) | |
parent | 8d18bcfd439b8422ab3bada2001cc2abd525d9f8 (diff) |
Merge remote-tracking branch 'u-boot-sh/rmobile'
Conflicts:
boards.cfg
Trivial conflict, maintainer change plus board addition
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r-- | arch/arm/cpu/armv7/rmobile/Makefile | 4 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/rmobile/cpu_info-r8a7791.c | 29 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/rmobile/cpu_info-rcar.c (renamed from arch/arm/cpu/armv7/rmobile/cpu_info-r8a7790.c) | 12 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/rmobile/cpu_info.c | 49 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S | 20 |
5 files changed, 50 insertions, 64 deletions
diff --git a/arch/arm/cpu/armv7/rmobile/Makefile b/arch/arm/cpu/armv7/rmobile/Makefile index 22219990dd..fad004ca64 100644 --- a/arch/arm/cpu/armv7/rmobile/Makefile +++ b/arch/arm/cpu/armv7/rmobile/Makefile @@ -11,7 +11,7 @@ obj-y += emac.o obj-$(CONFIG_DISPLAY_BOARDINFO) += board.o obj-$(CONFIG_GLOBAL_TIMER) += timer.o obj-$(CONFIG_R8A7740) += lowlevel_init.o cpu_info-r8a7740.o pfc-r8a7740.o -obj-$(CONFIG_R8A7790) += lowlevel_init_ca15.o cpu_info-r8a7790.o pfc-r8a7790.o -obj-$(CONFIG_R8A7791) += lowlevel_init_ca15.o cpu_info-r8a7791.o pfc-r8a7791.o +obj-$(CONFIG_R8A7790) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7790.o +obj-$(CONFIG_R8A7791) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7791.o obj-$(CONFIG_SH73A0) += lowlevel_init.o cpu_info-sh73a0.o pfc-sh73a0.o obj-$(CONFIG_TMU_TIMER) += ../../../../sh/lib/time.o diff --git a/arch/arm/cpu/armv7/rmobile/cpu_info-r8a7791.c b/arch/arm/cpu/armv7/rmobile/cpu_info-r8a7791.c deleted file mode 100644 index 2de58ed273..0000000000 --- a/arch/arm/cpu/armv7/rmobile/cpu_info-r8a7791.c +++ /dev/null @@ -1,29 +0,0 @@ -/* - * arch/arm/cpu/armv7/rmobile/cpu_info-r8a7791.c - * - * Copyright (C) 2013 Renesas Electronics Corporation - * - * SPDX-License-Identifier: GPL-2.0 - */ -#include <common.h> -#include <asm/io.h> - -#define PRR 0xFF000044 - -u32 rmobile_get_cpu_type(void) -{ - u32 product; - - product = readl(PRR); - - return (u32)((product & 0x00007F00) >> 8); -} - -u32 rmobile_get_cpu_rev_integer(void) -{ - u32 product; - - product = readl(PRR); - - return (u32)((product & 0x000000F0) >> 4); -} diff --git a/arch/arm/cpu/armv7/rmobile/cpu_info-r8a7790.c b/arch/arm/cpu/armv7/rmobile/cpu_info-rcar.c index 7232e23774..42ee30fbe7 100644 --- a/arch/arm/cpu/armv7/rmobile/cpu_info-r8a7790.c +++ b/arch/arm/cpu/armv7/rmobile/cpu_info-rcar.c @@ -1,8 +1,7 @@ /* - * arch/arm/cpu/armv7/rmobile/cpu_info-r8a7790.c - * This file is r8a7790 processor support. + * arch/arm/cpu/armv7/rmobile/cpu_info-rcar.c * - * Copyright (C) 2013 Renesas Electronics Corporation + * Copyright (C) 2013,2014 Renesas Electronics Corporation * * SPDX-License-Identifier: GPL-2.0 */ @@ -18,5 +17,10 @@ u32 rmobile_get_cpu_type(void) u32 rmobile_get_cpu_rev_integer(void) { - return (readl(PRR) & 0x000000F0) >> 4; + return ((readl(PRR) & 0x000000F0) >> 4) + 1; +} + +u32 rmobile_get_cpu_rev_fraction(void) +{ + return readl(PRR) & 0x0000000F; } diff --git a/arch/arm/cpu/armv7/rmobile/cpu_info.c b/arch/arm/cpu/armv7/rmobile/cpu_info.c index 83d5282e3e..7a7c97d791 100644 --- a/arch/arm/cpu/armv7/rmobile/cpu_info.c +++ b/arch/arm/cpu/armv7/rmobile/cpu_info.c @@ -44,35 +44,30 @@ static u32 __rmobile_get_cpu_rev_fraction(void) u32 rmobile_get_cpu_rev_fraction(void) __attribute__((weak, alias("__rmobile_get_cpu_rev_fraction"))); +/* CPU infomation table */ +static const struct { + u16 cpu_type; + u8 cpu_name[10]; +} rmobile_cpuinfo[] = { + { 0x37, "SH73A0" }, + { 0x40, "R8A7740" }, + { 0x45, "R8A7790" }, + { 0x47, "R8A7791" }, + { 0x0, "CPU" }, +}; + int print_cpuinfo(void) { - switch (rmobile_get_cpu_type()) { - case 0x37: - printf("CPU: Renesas Electronics SH73A0 rev %d.%d\n", - rmobile_get_cpu_rev_integer(), - rmobile_get_cpu_rev_fraction()); - break; - case 0x40: - printf("CPU: Renesas Electronics R8A7740 rev %d.%d\n", - rmobile_get_cpu_rev_integer(), - rmobile_get_cpu_rev_fraction()); - break; - - case 0x45: - printf("CPU: Renesas Electronics R8A7790 rev %d\n", - rmobile_get_cpu_rev_integer()); - break; - - case 0x47: - printf("CPU: Renesas Electronics R8A7791 rev %d\n", - rmobile_get_cpu_rev_integer()); - break; - - default: - printf("CPU: Renesas Electronics CPU rev %d.%d\n", - rmobile_get_cpu_rev_integer(), - rmobile_get_cpu_rev_fraction()); - break; + int i = 0; + u32 cpu_type = rmobile_get_cpu_type(); + for (; i < ARRAY_SIZE(rmobile_cpuinfo); i++) { + if (rmobile_cpuinfo[i].cpu_type == cpu_type) { + printf("CPU: Renesas Electronics %s rev %d.%d\n", + rmobile_cpuinfo[i].cpu_name, + rmobile_get_cpu_rev_integer(), + rmobile_get_cpu_rev_fraction()); + break; + } } return 0; } diff --git a/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S b/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S index e07cc8093a..287f8d74af 100644 --- a/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S +++ b/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S @@ -2,7 +2,7 @@ * arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S * This file is lager low level initialize. * - * Copyright (C) 2013 Renesas Electronics Corporation + * Copyright (C) 2013, 2014 Renesas Electronics Corporation * * SPDX-License-Identifier: GPL-2.0 */ @@ -36,16 +36,32 @@ do_cpu_waiting: .align 4 do_lowlevel_init: /* surpress wfe if ca15 */ - tst r4, #4 + tst r4, #4 mrceq p15, 0, r0, c1, c0, 1 /* actlr */ orreq r0, r0, #(1<<7) mcreq p15, 0, r0, c1, c0, 1 + /* and set l2 latency */ mrceq p15, 1, r0, c9, c0, 2 /* l2ctlr */ orreq r0, r0, #0x00000800 orreq r0, r0, #0x00000003 mcreq p15, 1, r0, c9, c0, 2 + mrc p15, 0, r0, c0, c0, 5 /* r0 = MPIDR */ + and r0, r0, #0xf00 + lsr r0, r0, #8 + tst r0, #1 /* only need for cluster 0 */ + bne _exit_init_l2_a15 + + mrc p15, 1, r0, c9, c0, 2 /* r0 = L2CTLR */ + and r1, r0, #7 + cmp r1, #3 /* has already been set up */ + bicne r0, r0, #0xe7 + orrne r0, r0, #0x83 /* L2CTLR[7:6] + L2CTLR[2:0] */ + orrne r0, r0, #0x20 /* L2CTLR[5] */ + mcrne p15, 1, r0, c9, c0, 2 + +_exit_init_l2_a15: ldr r3, =(CONFIG_SYS_INIT_SP_ADDR) sub sp, r3, #4 str lr, [sp] |