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authorMartyn Welch <martyn@welchs.me.uk>2018-12-11 11:34:46 +0000
committerStefano Babic <sbabic@denx.de>2019-01-28 12:47:27 +0100
commit0963060c9912c404280e5540018d02777b3400af (patch)
treee7731f4076e5294feaf8f98d4287e9f1538d2dab /arch/arm/dts/Makefile
parent774ec60b74a7b8d356a2ec6249936b097631a726 (diff)
imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063). CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0 Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg) Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Diffstat (limited to 'arch/arm/dts/Makefile')
-rw-r--r--arch/arm/dts/Makefile3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 5c3225bcbf..0e0bad9471 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -459,7 +459,8 @@ dtb-$(CONFIG_MX6UL) += \
imx6ul-isiot-nand.dtb \
imx6ul-opos6uldev.dtb \
imx6ul-14x14-evk.dtb \
- imx6ul-9x9-evk.dtb
+ imx6ul-9x9-evk.dtb \
+ imx6ul-phycore-segin.dtb
dtb-$(CONFIG_MX6ULL) += imx6ull-14x14-evk.dtb