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authorMichal Simek <michal.simek@xilinx.com>2019-06-28 13:16:10 +0200
committerMichal Simek <michal.simek@xilinx.com>2019-10-24 13:37:01 +0200
commit50d92833477eb582bed7cab9449997c3a39b6f17 (patch)
tree43a2773f92a2176dbcf86ad8cf5655fd86064054 /arch/arm/dts/Makefile
parent233750d3a12ccf8e8c2e889dc3ff685637b32df4 (diff)
arm64: zynqmp: Sync names for SC with Versal
ZynqMP based System controller is present on Versal boards. This patch is aligning names with Versal to follow the spec. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/dts/Makefile')
-rw-r--r--arch/arm/dts/Makefile6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 3b8dc2f56f..d9aaf128ad 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -250,9 +250,9 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
avnet-ultra96-rev1.dtb \
avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dtb \
zynqmp-a2197-revA.dtb \
- zynqmp-a2197-g-revA.dtb \
- zynqmp-a2197-m-revA.dtb \
- zynqmp-a2197-p-revA.dtb \
+ zynqmp-g-a2197-00-revA.dtb \
+ zynqmp-m-a2197-01-revA.dtb \
+ zynqmp-p-a2197-00-revA.dtb \
zynqmp-mini.dtb \
zynqmp-mini-emmc0.dtb \
zynqmp-mini-emmc1.dtb \