diff options
author | Chris Packham <judge.packham@gmail.com> | 2018-12-10 20:07:51 +1300 |
---|---|---|
committer | Stefan Roese <sr@denx.de> | 2019-01-21 11:39:49 +0100 |
commit | 30c4383da3fa2652e551b0610e71360394aa51e1 (patch) | |
tree | ec272d3b2c3c55536985a605481c3f26b4593fa9 /arch/arm/dts/armada-38x-controlcenterdc.dts | |
parent | 2acc24fc28ef782f4baef1aa0193d520ee9610b9 (diff) |
ARM: mvebu: sync Armada-38x dts with Linux 4.20
Sync the Armada-38x device tree files with Linux 4.20-rc5. The changes
not taken are new compatible strings for the uart and nand flash
controller. The nand binding is best updated if/when the mtd/nand
infrastructure is updated.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/arm/dts/armada-38x-controlcenterdc.dts')
-rw-r--r-- | arch/arm/dts/armada-38x-controlcenterdc.dts | 68 |
1 files changed, 34 insertions, 34 deletions
diff --git a/arch/arm/dts/armada-38x-controlcenterdc.dts b/arch/arm/dts/armada-38x-controlcenterdc.dts index 2cc996876a..ffbd0dcaae 100644 --- a/arch/arm/dts/armada-38x-controlcenterdc.dts +++ b/arch/arm/dts/armada-38x-controlcenterdc.dts @@ -72,40 +72,6 @@ MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; internal-regs { - spi0: spi@10600 { - status = "okay"; - sc16is741: sc16is741@0 { - compatible = "nxp,sc16is741"; - reg = <0>; - clocks = <&sc16isclk>; - spi-max-frequency = <4000000>; - interrupt-parent = <&gpio0>; - interrupts = <11 IRQ_TYPE_EDGE_FALLING>; - gpio-controller; - #gpio-cells = <2>; - }; - }; - - spi1: spi@10680 { - status = "okay"; - u-boot,dm-pre-reloc; - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "n25q016a", "spi-flash"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <108000000>; - }; - spi-flash@1 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "n25q128a11", "spi-flash"; - reg = <1>; /* Chip select 1 */ - spi-max-frequency = <108000000>; - u-boot,dm-pre-reloc; - }; - }; - I2C0: i2c@11000 { status = "okay"; clock-frequency = <1000000>; @@ -586,3 +552,37 @@ }; }; }; + +&spi0 { + status = "okay"; + sc16is741: sc16is741@0 { + compatible = "nxp,sc16is741"; + reg = <0>; + clocks = <&sc16isclk>; + spi-max-frequency = <4000000>; + interrupt-parent = <&gpio0>; + interrupts = <11 IRQ_TYPE_EDGE_FALLING>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&spi1 { + status = "okay"; + u-boot,dm-pre-reloc; + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "n25q016a", "spi-flash"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <108000000>; + }; + spi-flash@1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "n25q128a11", "spi-flash"; + reg = <1>; /* Chip select 1 */ + spi-max-frequency = <108000000>; + u-boot,dm-pre-reloc; + }; +}; |