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author | Lokesh Vutla <lokeshvutla@ti.com> | 2020-08-05 22:44:21 +0530 |
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committer | Lokesh Vutla <lokeshvutla@ti.com> | 2020-08-11 20:34:46 +0530 |
commit | 30de1ba0d375e418e94628037f3a1e30ec58f9aa (patch) | |
tree | ff0ba8a4f43813ba1590d1769ca930bfbf136444 /arch/arm/dts/da850-lcdk-u-boot.dtsi | |
parent | 73108dcd7ff06c696f50e25385f969a5d161bc8b (diff) |
arm: mach-k3: j7200: Add support for SOC detection
The J7200 SoC is a part of the K3 Multicore SoC architecture platform.
It is targeted for automotive gateway, vehicle compute systems,
Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications.
The SoC aims to meet the complex processing needs of modern embedded
products.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, two clusters of lockstep
capable dual Cortex-R5F MCUs and a Centralized Device Management and
Security Controller (DMSC).
* Configurable L3 Cache and IO-coherent architecture with high data
throughput capable distributed DMA architecture under NAVSS.
* Integrated Ethernet switch supporting up to a total of 4 external ports
in addition to legacy Ethernet switch of up to 2 ports.
* Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems,
20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and
I2C, eCAP/eQEP, eHRPWM among other peripherals.
* One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
See J7200 Technical Reference Manual (SPRUIU1, June 2020)
for further details: https://www.ti.com/lit/pdf/spruiu1
Add support for detection J7200 SoC
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Diffstat (limited to 'arch/arm/dts/da850-lcdk-u-boot.dtsi')
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