diff options
| author | Mugunthan V N <mugunthanvnm@ti.com> | 2016-09-27 13:01:41 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-10-08 09:33:35 -0400 |
| commit | e8131386dc38b5ea6e67df5532b90f3597f8f628 (patch) | |
| tree | d6ab075158275cba2e6ae0713f2141527d5cb5e5 /arch/arm/dts/dra72-evm-revc.dts | |
| parent | 692fcdd800e1987e69294e11f8cf570771c528c5 (diff) | |
ARM: dts: dra72: add rev C evm support
Add DTS support for dra72 evm Rev C which has the following
changes
* Two ethernet ports now instead of the single one in rev B.
* DP83867 ethernet phy instead of DP838865.
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/dts/dra72-evm-revc.dts')
| -rw-r--r-- | arch/arm/dts/dra72-evm-revc.dts | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/arch/arm/dts/dra72-evm-revc.dts b/arch/arm/dts/dra72-evm-revc.dts new file mode 100644 index 0000000000..0f8a7ef3c5 --- /dev/null +++ b/arch/arm/dts/dra72-evm-revc.dts @@ -0,0 +1,70 @@ +/* + * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include "dra72-evm-common.dtsi" +#include <dt-bindings/net/ti-dp83867.h> + +/ { + model = "TI DRA722 Rev C EVM"; + + memory { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */ + }; +}; + +&tps65917_regulators { + ldo2_reg: ldo2 { + /* LDO2_OUT --> VDDA_1V8_PHY2 */ + regulator-name = "ldo2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&hdmi { + vdda_video-supply = <&ldo2_reg>; +}; + +&mac { + mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>, + <&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */ + <&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */ + dual_emac; +}; + +&cpsw_emac0 { + phy-handle = <&dp83867_0>; + phy-mode = "rgmii-id"; + dual_emac_res_vlan = <1>; +}; + +&cpsw_emac1 { + phy-handle = <&dp83867_1>; + phy-mode = "rgmii-id"; + dual_emac_res_vlan = <2>; +}; + +&davinci_mdio { + dp83867_0: ethernet-phy@2 { + reg = <2>; + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; + ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; + ti,min-output-imepdance; + }; + + dp83867_1: ethernet-phy@3 { + reg = <3>; + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; + ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; + ti,min-output-imepdance; + }; +}; |