diff options
| author | Simon Glass <sjg@chromium.org> | 2018-12-10 10:37:30 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2018-12-13 16:32:49 -0700 |
| commit | 51b06dc40bce0768c77a23fcfc4a5ed5537aa2bd (patch) | |
| tree | ef71ff5748f7829e6e0b852d9ea9fd5dd96e4b4e /arch/arm/dts/exynos5420-peach-pit.dts | |
| parent | a1efd49ee269e0eeb9af12d52031853d08928810 (diff) | |
dm: sound: exynos: Correct codec bus addresses
For snow the codec is at address 0x11 on the i2c bus, in 7-bit format.
The device tree and code are in 8-bit format (i.e. shifted left one bit).
Fix both. Fix pit in a similar way.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/dts/exynos5420-peach-pit.dts')
| -rw-r--r-- | arch/arm/dts/exynos5420-peach-pit.dts | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/dts/exynos5420-peach-pit.dts b/arch/arm/dts/exynos5420-peach-pit.dts index c86f9d9035..bd0a9c116d 100644 --- a/arch/arm/dts/exynos5420-peach-pit.dts +++ b/arch/arm/dts/exynos5420-peach-pit.dts @@ -69,10 +69,10 @@ i2c@12CD0000 { /* i2c7 */ clock-frequency = <100000>; - soundcodec@20 { - reg = <0x20>; - compatible = "maxim,max98090-codec"; - }; + soundcodec@10 { + reg = <0x10>; + compatible = "maxim,max98090-codec"; + }; edp-lvds-bridge@48 { compatible = "parade,ps8625"; |