diff options
| author | Patrick Wildt <patrick@blueri.se> | 2019-10-03 15:51:50 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2019-10-08 16:36:36 +0200 |
| commit | d08a194871fdf91b2ccdbaf02e35ed9443e0e170 (patch) | |
| tree | 995ae6db6f1adff7d3af8ca8edbe5367706a5cba /arch/arm/dts/fsl-imx8mq.dtsi | |
| parent | 6745dac4946656771d320ba6887e863ae64c8b3e (diff) | |
imx: add support for i.MX8MQ power domain controller
Add support for the power domain controller that's used on the
i.MX8MQ. This will be needed to be able to power on the PCIe
controller. Bindings taken from Linux, driver implementation
taken from the i.MX8 power domain controller and adjusted for
the i.MX8M SoC.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Diffstat (limited to 'arch/arm/dts/fsl-imx8mq.dtsi')
| -rw-r--r-- | arch/arm/dts/fsl-imx8mq.dtsi | 38 |
1 files changed, 32 insertions, 6 deletions
diff --git a/arch/arm/dts/fsl-imx8mq.dtsi b/arch/arm/dts/fsl-imx8mq.dtsi index 814a1b7df4..fbf5009886 100644 --- a/arch/arm/dts/fsl-imx8mq.dtsi +++ b/arch/arm/dts/fsl-imx8mq.dtsi @@ -19,6 +19,7 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/pinctrl/pins-imx8mq.h> +#include <dt-bindings/power/imx8mq-power.h> #include <dt-bindings/thermal/thermal.h> / { @@ -71,12 +72,6 @@ interrupt-parent = <&gic>; }; - power: power-controller { - compatible = "fsl,imx8mq-pm-domain"; - num-domains = <11>; - #power-domain-cells = <1>; - }; - pwm2: pwm@30670000 { compatible = "fsl,imx8mq-pwm", "fsl,imx27-pwm"; reg = <0x0 0x30670000 0x0 0x10000>; @@ -276,6 +271,37 @@ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <3>; interrupt-parent = <&gic>; + + pgc { + #address-cells = <1>; + #size-cells = <0>; + + /* + * As per comment in ATF source code: + * + * PCIE1 and PCIE2 share the + * same reset signal, if we + * power down PCIE2, PCIE1 + * will be held in reset too. + * + * So instead of creating two + * separate power domains for + * PCIE1 and PCIE2 we create a + * link between both and use + * it as a shared PCIE power + * domain. + */ + pgc_pcie: power-domain@1 { + #power-domain-cells = <0>; + reg = <IMX8M_POWER_DOMAIN_PCIE1>; + power-domains = <&pgc_pcie2>; + }; + + pgc_pcie2: power-domain@a { + #power-domain-cells = <0>; + reg = <IMX8M_POWER_DOMAIN_PCIE2>; + }; + }; }; usdhc1: usdhc@30b40000 { |