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authorJohn Keeping <john@metanate.com>2016-07-15 17:33:23 +0100
committerSimon Glass <sjg@chromium.org>2016-07-25 20:46:46 -0600
commitc482c60a14e5fa44a62e13bab4d07c52c37915dc (patch)
treefe243b29544c13842cf5b9816f2ae3433d2990b8 /arch/arm/dts/fsl-ls1012a-rdb.dtsi
parent79c830653bab23bb0b6ce34793659b459cbacaa0 (diff)
rockchip: sdram: Fix register layout for Linux
The ChromeOS kernel reads the RAM settings from PMU_SYS_REG2 and expects the bootloader to store the necessary information there. We're using the same register to pass the same information between the SPL and U-Boot but in a slightly different format. Change this to use the format expected by the Linux DMC driver so that the system doesn't hang in Linux by misconfiguring the RAM. This is almost the same as commit b5788dc ("rockchip: rk3288: correct sdram setting") which was reverted in commit b525556 ("Revert "rockchip: rk3288: correct sdram setting"") but parenthese have been added to apply the mask correctly when reading the "bw" setting and a couple of minor style issues have been fixed to keep check_patch.pl happy. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
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