ARM: DTS: imx6q-logicpd: Resync with Linux 5.1

Resync imx6q-logicpd with Kernel 5.1.5

Signed-off-by: Adam Ford <aford173@gmail.com>

1 files changed, 182 insertions, 221 deletions

diff --git a/arch/arm/dts/imx6-logicpd-baseboard.dtsi b/arch/arm/dts/imx6-logicpd-baseboard.dtsi
index 303c09334b..c40a7af6eb 100644
--- a/arch/arm/dts/imx6-logicpd-baseboard.dtsi
+++ b/arch/arm/dts/imx6-logicpd-baseboard.dtsi
@@ -1,45 +1,6 @@
-/*
- * Copyright 2018 Logic PD, Inc.
- * Based on SabreSD, Copyright 2016 Freescale Semiconductor, Inc.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This file is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (C) 2019 Logic PD, Inc.
 
 / {
 	keyboard {
@@ -68,6 +29,7 @@
 			debounce-interval = <10>;
 			wakeup-source;
 		};
+
 		btn3 {
 			gpios = <&pcf8575 3 GPIO_ACTIVE_LOW>;
 			label = "btn3";
@@ -81,7 +43,7 @@
 	leds {
 		compatible = "gpio-leds";
 
-		gen_led0 {
+		gen-led0 {
 			label = "led0";
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_led0>;
@@ -89,25 +51,27 @@
 			linux,default-trigger = "cpu0";
 		};
 
-		gen_led1 {
+		gen-led1 {
 			label = "led1";
 			gpios = <&pcf8575 8 GPIO_ACTIVE_HIGH>;
 		};
 
-		gen_led2 {
+		gen-led2 {
 			label = "led2";
 			gpios = <&pcf8575 9 GPIO_ACTIVE_HIGH>;
 			linux,default-trigger = "heartbeat";
 		};
 
-		gen_led3 {
+		gen-led3 {
 			label = "led3";
 			gpios = <&pcf8575 10 GPIO_ACTIVE_HIGH>;
 			linux,default-trigger = "default-on";
 		};
 	};
 
-	reg_usb_otg_vbus: regulator-otg-vbus@0 {
+	reg_usb_otg_vbus: regulator-otg-vbus {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_reg_usb_otg>;
 		compatible = "regulator-fixed";
 		regulator-name = "usb_otg_vbus";
 		regulator-min-microvolt = <5000000>;
@@ -116,14 +80,19 @@
 		enable-active-high;
 	};
 
-	reg_usb_h1_vbus: regulator-usbh1vbus@1 {
+	reg_usb_h1_vbus: regulator-usb-h1-vbus {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_reg_usb_h1_vbus>;
 		compatible = "regulator-fixed";
 		regulator-name = "usb_h1_vbus";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
+		startup-delay-us = <70000>;
+		enable-active-high;
 	};
 
-	reg_3v3: regulator-3v3@2 {
+	reg_3v3: regulator-3v3 {
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_reg_3v3>;
 		compatible = "regulator-fixed";
@@ -131,13 +100,14 @@
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
 		gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
+		startup-delay-us = <70000>;
 		enable-active-high;
 		regulator-always-on;
 	};
 
-	reg_enet: regulator-ethernet@3 {
+	reg_enet: regulator-ethernet {
 		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_enet_pwr>;
+		pinctrl-0 = <&pinctrl_reg_enet>;
 		compatible = "regulator-fixed";
 		regulator-name = "ethernet-supply";
 		regulator-min-microvolt = <3300000>;
@@ -148,7 +118,7 @@
 		vin-supply = <&sw4_reg>;
 	};
 
-	reg_audio: regulator-audio@4 {
+	reg_audio: regulator-audio {
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_reg_audio>;
 		compatible = "regulator-fixed";
@@ -157,11 +127,10 @@
 		regulator-max-microvolt = <3300000>;
 		gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
 		enable-active-high;
-		regulator-always-on;
 		vin-supply = <&reg_3v3>;
 	};
 
-	reg_hdmi: regulator-hdmi@5 {
+	reg_hdmi: regulator-hdmi {
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_reg_hdmi>;
 		compatible = "regulator-fixed";
@@ -173,7 +142,7 @@
 		vin-supply = <&reg_3v3>;
 	};
 
-	reg_uart3: regulator-uart3@6 {
+	reg_uart3: regulator-uart3 {
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_reg_uart3>;
 		compatible = "regulator-fixed";
@@ -184,7 +153,7 @@
 		vin-supply = <&reg_3v3>;
 	};
 
-	reg_1v8: regulator-1v8@7 {
+	reg_1v8: regulator-1v8 {
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_reg_1v8>;
 		compatible = "regulator-fixed";
@@ -195,21 +164,21 @@
 		vin-supply = <&reg_3v3>;
 	};
 
-	reg_pcie: regulator@8 {
+	reg_pcie: regulator-pcie {
 		compatible = "regulator-fixed";
 		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_pcie_reg>;
-		regulator-name = "MPCIE_3V3";
+		pinctrl-0 = <&pinctrl_reg_pcie>;
+		regulator-name = "mpcie_3v3";
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
 		gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 		enable-active-high;
 	};
 
-	mipi_pwr: regulator@9 {
+	reg_mipi: regulator-mipi {
 		compatible = "regulator-fixed";
 		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_mipi_pwr>;
+		pinctrl-0 = <&pinctrl_reg_mipi>;
 		regulator-name = "mipi_pwr_en";
 		regulator-min-microvolt = <2800000>;
 		regulator-max-microvolt = <2800000>;
@@ -221,7 +190,7 @@
 		compatible = "fsl,imx-audio-wm8962";
 		model = "wm8962-audio";
 		ssi-controller = <&ssi2>;
-		audio-codec = <&codec>;
+		audio-codec = <&wm8962>;
 		audio-routing =
 			"Headphone Jack", "HPOUTL",
 			"Headphone Jack", "HPOUTR",
@@ -246,34 +215,10 @@
 	status = "disabled";
 };
 
-&pwm3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pwm3>;
-};
-
-&uart3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart3>;
-	status = "okay";
-};
-
-&usbh1 {
-	vbus-supply = <&reg_usb_h1_vbus>;
-	status = "okay";
-};
-
-&usbotg {
-	vbus-supply = <&reg_usb_otg_vbus>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_usbotg>;
-	disable-over-current;
-	status = "okay";
-};
-
 &fec {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_enet>;
-	phy-mode = "rgmii";
+	phy-mode = "rgmii-id";
 	phy-reset-duration = <10>;
 	phy-reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
 	phy-supply = <&reg_enet>;
@@ -282,23 +227,13 @@
 	status = "okay";
 };
 
-&usdhc2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_usdhc2>;
-	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
-	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
-	no-1-8-v;
-	keep-power-in-suspend;
-	status = "okay";
-};
-
 &i2c1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_i2c1>;
 	clock-frequency = <400000>;
 	status = "okay";
 
-	codec: wm8962@1a {
+	wm8962: audio-codec@1a {
 		compatible = "wlf,wm8962";
 		reg = <0x1a>;
 		clocks = <&clks IMX6QDL_CLK_CKO>;
@@ -330,9 +265,9 @@
 		reg = <0x10>;
 		clocks = <&clks IMX6QDL_CLK_CKO>;
 		clock-names = "xclk";
-		DOVDD-supply = <&mipi_pwr>;
-		AVDD-supply = <&mipi_pwr>;
-		DVDD-supply = <&mipi_pwr>;
+		DOVDD-supply = <&reg_mipi>;
+		AVDD-supply = <&reg_mipi>;
+		DVDD-supply = <&reg_mipi>;
 		reset-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
 		powerdown-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>;
 
@@ -361,6 +296,11 @@
 	};
 };
 
+&ipu1_csi1_from_mipi_vc1 {
+	clock-lanes = <0>;
+	data-lanes = <1 2>;
+};
+
 &mipi_csi {
 	status = "okay";
 
@@ -379,17 +319,52 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pcie>;
 	reset-gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;
-	status = "okay";
 	vpcie-supply = <&reg_pcie>;
-	/* fsl,max-link-speed = <2>; */
+	status = "okay";
+};
+
+&pwm3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm3>;
 };
 
 &ssi2 {
 	status = "okay";
 };
 
-&iomuxc {
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart3>;
+	status = "okay";
+};
 
+&usbh1 {
+	vbus-supply = <&reg_usb_h1_vbus>;
+	status = "okay";
+};
+
+&usbotg {
+	vbus-supply = <&reg_usb_otg_vbus>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbotg>;
+	disable-over-current;
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&usdhc2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc2>;
+	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
+	vmmc-supply = <&reg_3v3>;
+	no-1-8-v;
+	keep-power-in-suspend;
+	cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+	status = "okay";
+};
+
+&iomuxc {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX6QDL_PAD_DISP0_DAT20__AUD4_TXC  0x130b0
@@ -399,21 +374,49 @@
 		>;
 	};
 
-	pinctrl_i2c1: i2c1 {
+	pinctrl_ecspi1: ecspi1grp {
 		fsl,pins = <
-			MX6QDL_PAD_EIM_D21__I2C1_SCL	0x4001b8b1
-			MX6QDL_PAD_EIM_D28__I2C1_SDA	0x4001b8b1
+			MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK	0x100b1
+			MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI	0x100b1
+			MX6QDL_PAD_KEY_COL1__ECSPI1_MISO	0x100b1
+			MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0		0x100b1
 		>;
 	};
 
-	pinctrl_enet_pwr: enet_pwr {
+	pinctrl_enet: enetgrp {
 		fsl,pins = <
-			MX6QDL_PAD_EIM_D31__GPIO3_IO31	0x1b0b0
+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b8b0
+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0
+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
+			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x13030
+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x13030
+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x13030
+			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x1b0b0	/* ENET_INT */
+			MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24	0x1b0b0	/* ETHR_nRST */
 		>;
 	};
 
-	pinctrl_mipi_pwr: pwr_mipi {
-		fsl,pins = <MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b1>;
+	pinctrl_i2c1: i2c1grp {
+		fsl,pins = <
+			MX6QDL_PAD_EIM_D21__I2C1_SCL	0x4001b8b1
+			MX6QDL_PAD_EIM_D28__I2C1_SDA	0x4001b8b1
+		>;
+	};
+
+	pinctrl_led0: led0grp {
+	    fsl,pins = <
+		MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x1b0b0
+	    >;
 	};
 
 	pinctrl_ov5640: ov5640grp {
@@ -423,174 +426,132 @@
 		>;
 	};
 
-	pinctrl_reg_hdmi: reg_hdmi {
+	pinctrl_pcf8574: pcf8575grp {
 		fsl,pins = <
-			MX6QDL_PAD_EIM_D20__GPIO3_IO20	0x1b0b0
+			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0
 		>;
 	};
 
-	pinctrl_uart3: uart3grp {
+	pinctrl_pcie: pciegrp {
 		fsl,pins = <
-			MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1
-			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
-			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
-			MX6QDL_PAD_EIM_EB3__UART3_RTS_B		0x1b0b1
+			MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
+			MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
 		>;
 	};
 
-	pinctrl_usbotg: usbotggrp {
-		fsl,pins = <
-			MX6QDL_PAD_GPIO_1__USB_OTG_ID	0xd17059
-			MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR 0x130b0
-		>;
+	pinctrl_pwm3: pwm3grp {
+	    fsl,pins = <
+		MX6QDL_PAD_SD4_DAT1__PWM3_OUT		0x1b0b1
+	    >;
 	};
 
-	pinctrl_ecspi1: ecspi1grp {
-		fsl,pins = <
-			MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK	0x100b1
-			MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI	0x100b1
-			MX6QDL_PAD_KEY_COL1__ECSPI1_MISO	0x100b1
-			MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0		0x100b1
-		>;
+	pinctrl_reg_1v8: reg1v8grp {
+	    fsl,pins = <
+		MX6QDL_PAD_EIM_D30__GPIO3_IO30		0x1b0b0
+	    >;
 	};
 
-	pinctrl_usdhc2: usdhc2grp {
-		fsl,pins = <
-			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0	/* CD */
-			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17069
-			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10069
-			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17069
-			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17069
-			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17069
-			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17069
-		>;
-	};
-
-	pinctrl_usdhc2_100mhz: h100-usdhc2-100mhz {
-		fsl,pins = <
-			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0	/* CD */
-			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170b9
-			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100b9
-			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x170b9
-			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x170b9
-			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x170b9
-			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x170b9
-		>;
+	pinctrl_reg_3v3: reg3v3grp {
+	    fsl,pins = <
+		MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1b0b0
+	    >;
 	};
 
-	pinctrl_usdhc2_200mhz: h100-usdhc2-200mhz {
+	pinctrl_reg_audio: reg-audiogrp {
 		fsl,pins = <
-			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0	/* CD */
-			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170f9
-			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100f9
-			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x170f9
-			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x170f9
-			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x170f9
-			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x170f9
+			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
 		>;
 	};
 
-	pinctrl_enet: enetgrp {
+	pinctrl_reg_enet: reg-enetgrp {
 		fsl,pins = <
-			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b8b0
-			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
-			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
-			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
-			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
-			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
-			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
-			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0
-			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
-			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
-			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
-			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x13030
-			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x13030
-			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
-			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
-			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x13030
-			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x1b0b0	/* ENET_INT */
-			MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24	0x1b0b0	/* ETHR_nRST */
+			MX6QDL_PAD_EIM_D31__GPIO3_IO31	0x1b0b0
 		>;
 	};
 
-	pinctrl_reg_audio: audio-reg {
+	pinctrl_reg_hdmi: reg-hdmigrp {
 		fsl,pins = <
-			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
+			MX6QDL_PAD_EIM_D20__GPIO3_IO20	0x1b0b0
 		>;
 	};
 
-	pinctrl_pcie: pcie {
-		fsl,pins = <
-			MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
-			MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
-		>;
+	pinctrl_reg_mipi: reg-mipigrp {
+		fsl,pins = <MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b1>;
 	};
 
-	pinctrl_pcie_reg: pciereggrp {
+	pinctrl_reg_pcie: reg-pciegrp {
 		fsl,pins = <
 			MX6QDL_PAD_GPIO_2__GPIO1_IO02	0x1b0b0
 			>;
 	};
 
-	pinctrl_pcf8574: pcf8575-pins {
+	pinctrl_reg_uart3: reguart3grp {
+	    fsl,pins = <
+		MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0
+	    >;
+	};
+
+	pinctrl_reg_usb_h1_vbus: usbh1grp {
 		fsl,pins = <
-			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0
+			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x1b0b0
 		>;
 	};
 
-	pinctrl_lcd: lcdgrp {
+	pinctrl_reg_usb_otg: reg-usb-otggrp {
 		fsl,pins = <
-			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10	/* R_LCD_DCLK */
-			MX6QDL_PAD_DI0_PIN15__GPIO4_IO17	0x100b0	/* R_LCD_PANEL_PWR */
-			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02	0x10	/* R_LCD_HSYNC */
-			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03	0x10	/* R_LCD_VSYNC */
-			MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04	0x10	/* R_LCD_MDISP */
-			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x10
-			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x10
-			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
-			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
-			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
-			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
-			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
-			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
-			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
-			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
-			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
-			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
-			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
-			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
-			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
-			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
+			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x1b0b0
 		>;
 	};
 
-	pinctrl_pwm3: pwm3grp {
+	pinctrl_uart3: uart3grp {
 		fsl,pins = <
-			MX6QDL_PAD_SD4_DAT1__PWM3_OUT		0x1b0b1
+			MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1
+			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
+			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
+			MX6QDL_PAD_EIM_EB3__UART3_RTS_B		0x1b0b1
 		>;
 	};
 
-	pinctrl_reg_uart3: uart3reg {
+	pinctrl_usbotg: usbotggrp {
 		fsl,pins = <
-			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0
+			MX6QDL_PAD_GPIO_1__USB_OTG_ID	0xd17059
 		>;
 	};
 
-	pinctrl_reg_3v3: reg-3v3 {
+	pinctrl_usdhc2: usdhc2grp {
 		fsl,pins = <
-			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1b0b0
+			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0	/* CD */
+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17069
+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10069
+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17069
+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17069
+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17069
+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17069
 		>;
 	};
 
-	pinctrl_reg_1v8: reg-1v8 {
+	pinctrl_usdhc2_100mhz: h100-usdhc2-100mhz {
 		fsl,pins = <
-			MX6QDL_PAD_EIM_D30__GPIO3_IO30		0x1b0b0
+			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0	/* CD */
+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170b9
+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100b9
+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x170b9
+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x170b9
+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x170b9
+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x170b9
 		>;
 	};
 
-	pinctrl_led0: led0 {
+	pinctrl_usdhc2_200mhz: h100-usdhc2-200mhz {
 		fsl,pins = <
-			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x1b0b0
+			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0	/* CD */
+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170f9
+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100f9
+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x170f9
+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x170f9
+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x170f9
+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x170f9
 		>;
 	};
+
 };