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authorJagan Teki <jagannadh.teki@gmail.com>2017-11-21 00:02:14 +0530
committerStefano Babic <sbabic@denx.de>2017-11-27 10:36:40 +0100
commit152038ea1886782fff6f1c7ca5f3aaa2da9a66fb (patch)
treede8aaa6bcae0fc980b2f0256a9c9fac451f3f49b /arch/arm/dts/imx6ul-geam-kit.dts
parentbb0297ccbd47de6bafc7bf54b31f7181bb346f69 (diff)
i.MX6UL: icore: Add SPL_OF_CONTROL support
Add OF_CONTROL support for SPL code. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'arch/arm/dts/imx6ul-geam-kit.dts')
-rw-r--r--arch/arm/dts/imx6ul-geam-kit.dts4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6ul-geam-kit.dts b/arch/arm/dts/imx6ul-geam-kit.dts
index 07c21cb0a2..15e3f94153 100644
--- a/arch/arm/dts/imx6ul-geam-kit.dts
+++ b/arch/arm/dts/imx6ul-geam-kit.dts
@@ -87,6 +87,7 @@
};
&usdhc1 {
+ u-boot,dm-spl;
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
@@ -134,6 +135,7 @@
};
pinctrl_usdhc1: usdhc1grp {
+ u-boot,dm-spl;
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
@@ -145,6 +147,7 @@
};
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ u-boot,dm-spl;
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
@@ -156,6 +159,7 @@
};
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ u-boot,dm-spl;
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9