diff options
| author | Peng Fan <peng.fan@nxp.com> | 2019-09-16 03:09:55 +0000 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2019-11-05 10:27:18 +0100 |
| commit | d239d9d9464f7eb3a9ae1d3b45865149a758b501 (patch) | |
| tree | ac7d7d6d560cefbe0f8c0da59e44fd50b06288af /arch/arm/dts/imx8mm-evk.dts | |
| parent | dadb072f1231850e0eb3cff53c88ff69211e099f (diff) | |
imx: add i.MX8MN DDR4 board support
Support pinctrl/clk/sdhc, include ddr4 timing data.
Log:
U-Boot SPL 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800)
Normal Boot
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0
U-Boot 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800)
CPU: Freescale i.MX8MNano rev1.0 at 24 MHz
Reset cause: POR
Model: NXP i.MX8MNano DDR4 EVK board
DRAM: 2 GiB
MMC: FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... *** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: No ethernet found.
Hit any key to stop autoboot: 0
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm/dts/imx8mm-evk.dts')
| -rw-r--r-- | arch/arm/dts/imx8mm-evk.dts | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/dts/imx8mm-evk.dts b/arch/arm/dts/imx8mm-evk.dts index faefb7182a..ef249ff519 100644 --- a/arch/arm/dts/imx8mm-evk.dts +++ b/arch/arm/dts/imx8mm-evk.dts @@ -464,7 +464,7 @@ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 - MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 >; }; @@ -480,7 +480,7 @@ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 - MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 >; }; @@ -496,7 +496,7 @@ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 - MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 >; }; |