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authorStefano Babic <sbabic@denx.de>2015-10-23 12:35:42 +0200
committerStefano Babic <sbabic@denx.de>2015-10-23 12:35:42 +0200
commita69fdc7787bfa2f27eed74c2ee58c28ce932d502 (patch)
tree4731dbe1c7371c0c797641d9e755a93e614ec930 /arch/arm/dts/k2g.dtsi
parent42e550d44bc2335a18065b155cc408f30f0502ef (diff)
parent9f13b6d147dc74f2400ce18d9d4005ba53f21fd3 (diff)
Merge branch 'master' of git://git.denx.de/u-boot
Diffstat (limited to 'arch/arm/dts/k2g.dtsi')
-rw-r--r--arch/arm/dts/k2g.dtsi72
1 files changed, 72 insertions, 0 deletions
diff --git a/arch/arm/dts/k2g.dtsi b/arch/arm/dts/k2g.dtsi
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+++ b/arch/arm/dts/k2g.dtsi
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+/*
+ * Copyright 2014 Texas Instruments, Inc.
+ *
+ * Keystone 2 Galileo soc device tree
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "skeleton.dtsi"
+
+/ {
+ model = "Texas Instruments Keystone 2 SoC";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&gic>;
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x80000000>;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ interrupt-parent = <&gic>;
+
+ cpu@0 {
+ compatible = "arm,cortex-a15";
+ device_type = "cpu";
+ reg = <0>;
+ };
+ };
+
+ gic: interrupt-controller {
+ compatible = "arm,cortex-a15-gic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x0 0x02561000 0x0 0x1000>,
+ <0x0 0x02562000 0x0 0x2000>,
+ <0x0 0x02564000 0x0 0x1000>,
+ <0x0 0x02566000 0x0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ti,keystone","simple-bus";
+ interrupt-parent = <&gic>;
+ ranges;
+
+ uart0: serial@02530c00 {
+ compatible = "ns16550a";
+ current-speed = <115200>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ reg = <0x02530c00 0x100>;
+ clock-names = "uart";
+ interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
+ };
+
+ };
+};