diff options
author | Vignesh Raghavendra <vigneshr@ti.com> | 2020-07-07 13:43:35 +0530 |
---|---|---|
committer | Lokesh Vutla <lokeshvutla@ti.com> | 2020-07-13 20:58:34 +0530 |
commit | 99faf0df0479f818530d4e995d59917e0c10dafd (patch) | |
tree | 98308e50511113aa74fd7551cbd69b8077a494ad /arch/arm/dts/k3-am65-mcu.dtsi | |
parent | 5c92fffab233457505006da2eae727265f71f316 (diff) |
arm: dts: k3-am65/j721e: Sync DMA DT bindings from Kernel DT
Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi
files.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Diffstat (limited to 'arch/arm/dts/k3-am65-mcu.dtsi')
-rw-r--r-- | arch/arm/dts/k3-am65-mcu.dtsi | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-am65-mcu.dtsi b/arch/arm/dts/k3-am65-mcu.dtsi index bc9a87210d..d1a9fb5de6 100644 --- a/arch/arm/dts/k3-am65-mcu.dtsi +++ b/arch/arm/dts/k3-am65-mcu.dtsi @@ -102,4 +102,48 @@ #size-cells = <0>; }; }; + + mcu_navss { + compatible = "simple-mfd"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + dma-coherent; + dma-ranges; + + ti,sci-dev-id = <119>; + + mcu_ringacc: ringacc@2b800000 { + compatible = "ti,am654-navss-ringacc"; + reg = <0x0 0x2b800000 0x0 0x400000>, + <0x0 0x2b000000 0x0 0x400000>, + <0x0 0x28590000 0x0 0x100>, + <0x0 0x2a500000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + ti,num-rings = <286>; + ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */ + ti,dma-ring-reset-quirk; + ti,sci = <&dmsc>; + ti,sci-dev-id = <195>; + }; + + mcu_udmap: dma-controller@285c0000 { + compatible = "ti,am654-navss-mcu-udmap"; + reg = <0x0 0x285c0000 0x0 0x100>, + <0x0 0x2a800000 0x0 0x40000>, + <0x0 0x2aa00000 0x0 0x40000>; + reg-names = "gcfg", "rchanrt", "tchanrt"; + #dma-cells = <1>; + + ti,sci = <&dmsc>; + ti,sci-dev-id = <194>; + ti,ringacc = <&mcu_ringacc>; + + ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */ + <0x2>; /* TX_CHAN */ + ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */ + <0x4>; /* RX_CHAN */ + ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */ + }; + }; }; |