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authorVignesh Raghavendra <vigneshr@ti.com>2019-11-18 19:16:35 +0530
committerLokesh Vutla <lokeshvutla@ti.com>2020-01-20 10:10:28 +0530
commit5aeab3bf5e4d22e04eb5fc835d14007d8d311106 (patch)
tree8da076a44a34aca413c9d1f400d41990ce5ce575 /arch/arm/dts/k3-j721e-common-proc-board.dts
parentf4b3c1cc33730a4e9ecccab275a513ec8e08a073 (diff)
arm: dts: k3-j721e: Add DT nodes for USB
J721e has two instances of Cadence USB3 controller. Add DT nodes for the same. USB0 is configured to device mode and USB1 is configured to host mode. For now only high speed mode is supported. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/dts/k3-j721e-common-proc-board.dts')
-rw-r--r--arch/arm/dts/k3-j721e-common-proc-board.dts37
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-j721e-common-proc-board.dts b/arch/arm/dts/k3-j721e-common-proc-board.dts
index c978cabd13..137da7e425 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-common-proc-board.dts
@@ -77,3 +77,40 @@
voltage-ranges = <1800 1800 3300 3300>;
ti,driver-strength-ohm = <50>;
};
+
+&main_pmx0 {
+ main_usbss0_pins_default: main_usbss0_pins_default {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */
+ J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */
+ >;
+ };
+
+ main_usbss1_pins_default: main_usbss1_pins_default {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */
+ >;
+ };
+};
+
+&usbss0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_usbss0_pins_default>;
+ ti,vbus-divider;
+};
+
+&usb0 {
+ dr_mode = "otg";
+ maximum-speed = "super-speed";
+};
+
+&usbss1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_usbss1_pins_default>;
+ ti,usb2-only;
+};
+
+&usb1 {
+ dr_mode = "host";
+ maximum-speed = "high-speed";
+};