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authorhaikun <haikun.wang@freescale.com>2015-03-24 21:16:31 +0800
committerSimon Glass <sjg@chromium.org>2015-04-18 11:11:17 -0600
commitce35fc17f00e3d02fbf5d2156e1ff114c9bcc1dc (patch)
tree635726cf3e86262f7ed6394487d24e31249945f1 /arch/arm/dts/ls1021a-qds.dts
parentddf79f3623ad3062f1653e6c075d21448ff3b2cb (diff)
dm: ls1021a: dts: Change address_cells and size_cells from 2 to 1
Change address_cells and size_cells of root node and 'soc' node from 2 to 1. We backport ls1021a device tree source files from kernel to u-boot. Kernel files set address_cells and size_cells to 2 in order to access more than 4GB space. But we don't have this requirement now and u-boot fdtdec_get_xxx interfaces can't support property whose size is 'u64' completely. So make this change. Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/dts/ls1021a-qds.dts')
-rw-r--r--arch/arm/dts/ls1021a-qds.dts6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/dts/ls1021a-qds.dts b/arch/arm/dts/ls1021a-qds.dts
index c89f85e001..7454ac6ca7 100644
--- a/arch/arm/dts/ls1021a-qds.dts
+++ b/arch/arm/dts/ls1021a-qds.dts
@@ -101,9 +101,9 @@
#address-cells = <2>;
#size-cells = <1>;
/* NOR, NAND Flashes and FPGA on board */
- ranges = <0x0 0x0 0x0 0x60000000 0x08000000
- 0x2 0x0 0x0 0x7e800000 0x00010000
- 0x3 0x0 0x0 0x7fb00000 0x00000100>;
+ ranges = <0x0 0x0 0x60000000 0x08000000
+ 0x2 0x0 0x7e800000 0x00010000
+ 0x3 0x0 0x7fb00000 0x00000100>;
status = "okay";
nor@0,0 {