diff options
author | Jerome Brunet <jbrunet@baylibre.com> | 2020-03-05 12:12:38 +0100 |
---|---|---|
committer | Neil Armstrong <narmstrong@baylibre.com> | 2020-04-06 09:56:35 +0200 |
commit | dd5f2351e99aad8fcbedbc1305b8b51b09952336 (patch) | |
tree | 727bfd4c1de1adc8af73e5d0538876818cb9ea6f /arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts | |
parent | b3d69aa596599c7c940f7ad463c04b693589ff9a (diff) |
arm64: dts: meson: sync dt and bindings from v5.6-rc2
Sync the device tree and dt-bindings from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2")
The only exception to this is the mmc pinctrl pin bias of gxl SoC family.
This is a fix which found its way to u-boot but not Linux yet.
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Diffstat (limited to 'arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts')
-rw-r--r-- | arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts b/arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts index 3a6a1e0c1e..124a809010 100644 --- a/arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts +++ b/arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts @@ -14,3 +14,28 @@ / { compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b"; }; + +/* + * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential + * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between + * an USB3.0 Type A connector and a M.2 Key M slot. + * The PHY driving these differential lines is shared between + * the USB3.0 controller and the PCIe Controller, thus only + * a single controller can use it. + * If the MCU is configured to mux the PCIe/USB3.0 differential lines + * to the M.2 Key M slot, uncomment the following block to disable + * USB3.0 from the USB Complex and enable the PCIe controller. + * The End User is not expected to uncomment the following except for + * testing purposes, but instead rely on the firmware/bootloader to + * update these nodes accordingly if PCIe mode is selected by the MCU. + */ +/* +&pcie { + status = "okay"; +}; + +&usb { + phys = <&usb2_phy0>, <&usb2_phy1>; + phy-names = "usb2-phy0", "usb2-phy1"; +}; + */ |