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authorMarek Vasut <marek.vasut+renesas@gmail.com>2018-05-31 19:56:36 +0200
committerMarek Vasut <marek.vasut+renesas@gmail.com>2018-06-16 02:17:57 +0200
commitef6765ca62dddc0b1f07471a05b48fb79eb58a46 (patch)
treee6c1aef090791ef8e2cb413470992be6bb72a1e3 /arch/arm/dts/r8a77990.dtsi
parent65dcc809cd05d8d736c97244f850c6d9f4b78e9d (diff)
ARM: dts: rmobile: Add initial SDHI nodes to R8A77990 E3
Add SDHI nodes to R8A77990 E3 SoC to allow SDHI operation. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'arch/arm/dts/r8a77990.dtsi')
-rw-r--r--arch/arm/dts/r8a77990.dtsi24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/dts/r8a77990.dtsi b/arch/arm/dts/r8a77990.dtsi
index 4f77be2a60..6d2d5e1068 100644
--- a/arch/arm/dts/r8a77990.dtsi
+++ b/arch/arm/dts/r8a77990.dtsi
@@ -185,6 +185,30 @@
reg = <0 0xe6160000 0 0x0200>;
};
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a77990";
+ reg = <0 0xee100000 0 0x2000>;
+ clocks = <&cpg CPG_MOD 314>;
+ max-frequency = <200000000>;
+ status = "disabled";
+ };
+
+ sdhi1: sd@ee120000 {
+ compatible = "renesas,sdhi-r8a77990";
+ reg = <0 0xee120000 0 0x2000>;
+ clocks = <&cpg CPG_MOD 313>;
+ max-frequency = <200000000>;
+ status = "disabled";
+ };
+
+ sdhi3: sd@ee160000 {
+ compatible = "renesas,sdhi-r8a77990";
+ reg = <0 0xee160000 0 0x2000>;
+ clocks = <&cpg CPG_MOD 311>;
+ max-frequency = <200000000>;
+ status = "disabled";
+ };
+
sysc: system-controller@e6180000 {
compatible = "renesas,r8a77990-sysc";
reg = <0 0xe6180000 0 0x0400>;