diff options
| author | Kever Yang <kever.yang@rock-chips.com> | 2019-07-09 21:58:51 +0800 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2019-07-20 23:59:44 +0800 |
| commit | 2ea3addfa22a60500220970e481e38f9a3749118 (patch) | |
| tree | 5cc080c0f92ab2688a998b15f9976ed54d62d106 /arch/arm/dts/rk3288-firefly.dtsi | |
| parent | e4ea8f3c0869ef396a43bd3c9e4d3359da956349 (diff) | |
rockchip: rk3288-firefly: sync sdmmc pinctrl from mainline
The rk3288-firefly board have different setting for sdmmc
io, sync then from kernel mainline:
6fbc7275c7a9 Linux 5.2-rc7
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm/dts/rk3288-firefly.dtsi')
| -rw-r--r-- | arch/arm/dts/rk3288-firefly.dtsi | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/arch/arm/dts/rk3288-firefly.dtsi b/arch/arm/dts/rk3288-firefly.dtsi index 2239ab9f59..b7f279f706 100644 --- a/arch/arm/dts/rk3288-firefly.dtsi +++ b/arch/arm/dts/rk3288-firefly.dtsi @@ -320,6 +320,11 @@ output-low; }; + pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma { + bias-pull-up; + drive-strength = <12>; + }; + act8846 { pwr_hold: pwr-hold { rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>; @@ -363,8 +368,27 @@ }; sdmmc { + /* + * Default drive strength isn't enough to achieve even + * high-speed mode on firefly board so bump up to 12ma. + */ + sdmmc_bus4: sdmmc-bus4 { + rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_12ma>, + <6 RK_PC1 1 &pcfg_pull_up_drv_12ma>, + <6 RK_PC2 1 &pcfg_pull_up_drv_12ma>, + <6 RK_PC3 1 &pcfg_pull_up_drv_12ma>; + }; + + sdmmc_clk: sdmmc-clk { + rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_12ma>; + }; + + sdmmc_cmd: sdmmc-cmd { + rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_12ma>; + }; + sdmmc_pwr: sdmmc-pwr { - rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; }; }; |