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authorTom Rini <trini@konsulko.com>2019-12-06 10:35:18 -0500
committerTom Rini <trini@konsulko.com>2019-12-06 10:35:18 -0500
commitbead4f2f2c85e1bf39d2c80ef733f1325eb336bb (patch)
treeab462e322dffa41f8719a25eaa029b9900fe1e55 /arch/arm/dts/rk3308.dtsi
parentedbb8e09183e6c232b14ed1a087f93b7f0b560ac (diff)
parentb2e373d16b0345d3c3f4beefdf0889e83faf173d (diff)
Merge tag 'u-boot-rockchip-20191206' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- rockchip pwm driver update to support all the SoCs - RK3308 GMAC and pinctrl support - More UART interface support on PX30 and pmugrf reg fix - Fixup on misc for eth_addr/serial# - Other updates on variant SoCs
Diffstat (limited to 'arch/arm/dts/rk3308.dtsi')
-rw-r--r--arch/arm/dts/rk3308.dtsi22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 0eeec165d4..a5c0b72ae0 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -627,6 +627,28 @@
status = "disabled";
};
+ mac: ethernet@ff4e0000 {
+ compatible = "rockchip,rk3308-mac";
+ reg = <0x0 0xff4e0000 0x0 0x10000>;
+ rockchip,grf = <&grf>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX_TX>,
+ <&cru SCLK_MAC_RX_TX>, <&cru SCLK_MAC_REF>,
+ <&cru SCLK_MAC>, <&cru ACLK_MAC>,
+ <&cru PCLK_MAC>, <&cru SCLK_MAC_RMII>;
+ clock-names = "stmmaceth", "mac_clk_rx",
+ "mac_clk_tx", "clk_mac_ref",
+ "clk_mac_refout", "aclk_mac",
+ "pclk_mac", "clk_mac_speed";
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rmii_pins &mac_refclk_12ma>;
+ resets = <&cru SRST_MAC_A>;
+ reset-names = "stmmaceth";
+ status = "disabled";
+ };
+
cru: clock-controller@ff500000 {
compatible = "rockchip,rk3308-cru";
reg = <0x0 0xff500000 0x0 0x1000>;