diff options
| author | Wenyou Yang <wenyou.yang@atmel.com> | 2017-09-13 14:58:54 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-09-14 16:02:46 -0400 |
| commit | ce4054bf82d66f5ac51635a4337f15f6aa32ceac (patch) | |
| tree | 5519d085105657cb72c5372c2acc76e5a8c49fed /arch/arm/dts/sama5d2.dtsi | |
| parent | 245cbc583db7c1ca52aa32428b8e86f3449d4af2 (diff) | |
board: atmel: Add SAMA5D27 SOM1 EK board
The SAMA5D27-SiP (System in Package) integrates the SAMA5D2
with 1Gbit DDR2-SDRAM in a single package.
The SAMA5D27 SOM1 embeds a 64Mbit QSPI flash, KSZ8081 Phy and
Mac-address EEPROM.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/dts/sama5d2.dtsi')
| -rw-r--r-- | arch/arm/dts/sama5d2.dtsi | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi index 4233ef8c18..b02a602378 100644 --- a/arch/arm/dts/sama5d2.dtsi +++ b/arch/arm/dts/sama5d2.dtsi @@ -505,11 +505,13 @@ qspi0_clk: qspi0_clk@52 { #clock-cells = <0>; reg = <52>; + u-boot,dm-pre-reloc; }; qspi1_clk: qspi1_clk@53 { #clock-cells = <0>; reg = <53>; + u-boot,dm-pre-reloc; }; }; @@ -596,6 +598,16 @@ status = "disabled"; }; + qspi1: spi@f0024000 { + compatible = "atmel,sama5d2-qspi"; + reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>; + reg-names = "qspi_base", "qspi_mmap"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&qspi1_clk>; + status = "disabled"; + }; + spi0: spi@f8000000 { compatible = "atmel,at91rm9200-spi"; reg = <0xf8000000 0x100>; @@ -700,6 +712,14 @@ status = "disabled"; }; + uart3: serial@fc008000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfc008000 0x100>; + clocks = <&uart3_clk>; + clock-names = "usart"; + status = "disabled"; + }; + i2c1: i2c@fc028000 { compatible = "atmel,sama5d2-i2c"; reg = <0xfc028000 0x100>; |