summaryrefslogtreecommitdiff
path: root/arch/arm/dts/socfpga_arria5_secu1.dts
diff options
context:
space:
mode:
authorMarek Vasut <marex@denx.de>2020-03-06 21:52:21 +0100
committerMarek Vasut <marex@denx.de>2020-04-13 13:49:51 +0200
commit8876f89640d3386822025f42b60b1ff9dd679123 (patch)
tree58f679e97501edd5592174adefd467e1ebd645cf /arch/arm/dts/socfpga_arria5_secu1.dts
parent995972ddbbcc5fccd324ab384bca9af90e710755 (diff)
ARM: socfpga: Enable DM RTC bootcount on ABB SECU1
Add and enable RTC-backed boot counter on ABB SECU1 platform. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/arm/dts/socfpga_arria5_secu1.dts')
-rw-r--r--arch/arm/dts/socfpga_arria5_secu1.dts6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_arria5_secu1.dts b/arch/arm/dts/socfpga_arria5_secu1.dts
index dadf766682..820e29ad6d 100644
--- a/arch/arm/dts/socfpga_arria5_secu1.dts
+++ b/arch/arm/dts/socfpga_arria5_secu1.dts
@@ -31,6 +31,12 @@
spi0 = &spi1;
};
+ bootcount@0 {
+ compatible = "u-boot,bootcount-rtc";
+ rtc = <&rtc>;
+ offset = <0x9e>;
+ };
+
i2c_gpio: i2c@0 {
compatible = "i2c-gpio";
#address-cells = <1>;