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authorTom Rini <trini@konsulko.com>2018-11-29 16:36:53 -0500
committerTom Rini <trini@konsulko.com>2018-11-29 16:36:53 -0500
commit6d4a3ff2649faa2cf2739e332557f256cc34831e (patch)
tree0d732648670188246051bd404544c3612f920d62 /arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi
parent93e72ac472b537bb4b0c6a97a7e6aab2b37860c6 (diff)
parent30bade20a67a8205e10d006d8e1ac66552c1b137 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi')
-rw-r--r--arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi60
1 files changed, 60 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi
new file mode 100644
index 0000000000..360b946ba2
--- /dev/null
+++ b/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR X11)
+/*
+ * U-Boot additions
+ *
+ * Copyright (C) 2015 Marek Vasut <marex@denx.de>
+ * Copyright (c) 2018 Simon Goldschmidt
+ */
+
+/{
+ aliases {
+ spi0 = "/soc/spi@ff705000";
+ udc0 = &usb0;
+ };
+
+ soc {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&watchdog0 {
+ status = "disabled";
+};
+
+&mmc {
+ u-boot,dm-pre-reloc;
+};
+
+&qspi {
+ u-boot,dm-pre-reloc;
+
+ n25q128@0 {
+ compatible = "n25q128", "spi-flash";
+ u-boot,dm-pre-reloc;
+ };
+ n25q00@1 {
+ compatible = "n25q00", "spi-flash";
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&uart0 {
+ clock-frequency = <100000000>;
+ u-boot,dm-pre-reloc;
+};
+
+&uart1 {
+ clock-frequency = <100000000>;
+};
+
+&porta {
+ bank-name = "porta";
+};
+
+&portb {
+ bank-name = "portb";
+};
+
+&portc {
+ bank-name = "portc";
+};